 |
|
|
|
|
|
 Title: |
US3800129:
MOS DESK CALCULATOR
[ Derwent Title ]
|
| Country: |
US United States of America
|
| |
| Inventor: |
Umstattd, Richard H.; Canoga Park, CA
|
| Assignee: |
Electronic Arrays, Inc., Woodland Hills, CA
other patents from ELECTRONICS ARRAYS, INC. (168590) (approx. 17)
News, Profiles, Stocks and More about this company
|
| Published / Filed: |
1974-03-26
/ 1970-12-28
|
| Application Number: |
US1970000101769
|
| IPC Code: |
Advanced:
G06F 9/26;
G06F 15/02;
G06F 15/78;
H03M 11/20;
IPC-7:
G06F 7/38;
|
| ECLA Code: |
H03M11/20; G06F9/26N; G06F15/02; G06F15/78P2;
|
| U.S. Class: |
Current:
708/139;
708/190;
712/E09.011;
Original:
235/156;
235/160;
|
| Field of Search: |
235/152,156,159,160,92 ME,92 DE
340/172.5,365
|
| Priority Number: |
| 1970-12-28 |
US1970000101769 |
|
| Abstract: |
A 5-MOS chip desk calculator wth input switching matrix which is periodically interrogated for inputting, and display control for outputting. The chips are designed for minimum interchip connection. Information is inputted via a keyboard and switching matrix, which is continuously interrogated by a recycling counting process. Number ranges are used to distinguish between command entries and digit entries. Entered arithmetic commands are executed after entry of the next command, figures are stored as entered. Special provisions are made for decimal point setting and entry.
|
| Attorney, Agent or Firm: |
Smyth, Roston & Pavitt ;
|
| Primary / Asst. Examiners: |
Gruber, Felix D.; Gottman, James F.
|
| Family: |
None
|
First Claim:
Show all 19 claims |
1. In a desk calculator having a first plurality of interrogation lines; a second plurality of sense lines disposed relative to the lines of the first plurality to establish a matrix, each line of the first plurality, further having switches disposed in the intersections to respectively interconnect the two lines in the respective intersection; the improvement comprising in combination:
- first circuit means connected to the lines of the first plurality to sequentially and periodically introduce interrogation signals effective on all of the switches;
- second circuit means connected to the lines of the second plurality and interrogating all of the lines of the second plurality to respond to an interrogation signal that is passed through a closed one of the switches and the line of the second plurality on the closed switch, the first and second circuit means including a recycling scan counter for providing the interrogation signals, the counter being halted in response to a signal in a line of the second plurality, the state of the counter constituting a representation of identity of the closed switch;
- third circuit means connected to the second circuit means and respectively responsive to the different ranges for count state numbers for interpreting the state of the counter when halted as command or as figure entry into the calculator;
- fourth circuit means connected to the third circuit means providing arithmetic operations in response to a command entry; and
- fifth circuit means connected to the third circuit means storing digital
|
| Background / Summary: |
Show background / summary
|
| Drawing Descriptions: |
Show drawing descriptions
|
| Description: |
Show description
|
| Forward References: |
Show 26 U.S. patent(s) that reference this one
|
