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Title: US4120043: Method and apparatus for multi-function, stored logic Boolean function generation
[ Derwent Title ]


Country: US United States of America

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16 pages

 
Inventor: Su, Chauchang; West Bloomfield Township, Oakland County, MI

Assignee: Burroughs Corporation, Detroit, MI
other patents from UNISYS CORPORATION (596125) (approx. 6,717)
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Published / Filed: 1978-10-10 / 1976-04-30

Application Number: US1976000682118

IPC Code: Advanced: G06K 9/64; G06T 1/00;
Core: more...
IPC-7: G06F 1/02; G06F 13/00;

ECLA Code: G06K9/64; G06T1/00A;

U.S. Class: Current: 708/230; 326/046;
Original: 364/900; 364/716;

Field of Search: 340/172.5,166 R 235/152 307/207 364/900 MS File,200 MS File,716

Priority Number:
1976-04-30  US1976000682118

Abstract:     A stored logic Boolean function generator having a control word storage coupled to a control block for selectively configuring the control block into logic circuits for simulating either a logical AND circuit or a logical OR circuit for operating on binary signals. At least two external addressable binary signal stores are coupled to the control block. The two external addressable stores alternately and oppositely serve as source and destination storage devices for binary signals which are operated upon by the control block. One of the addressable stores serves as a source of binary signals which are supplied to the control block and operated upon by the logical circuit simulated therein. The results of the logical manipulation are stored in the other of the externally addressable stores which thus serves as a destination storage device. The control block is reconfigured according to the next successive control word stored in the control word storage and the flow of binary data through the control block is reversed such that the former destination store serves as the source of binary signals to the control block and the former source store serves as the destination for the control block. The binary data is continually circulated through the control block until the sequence of logical operations stored in the control word storage has been completed and the predetermined logical function performed.

Attorney, Agent or Firm: Jarvis, Larry Michael ; Peterson, Kevin R. ; Feeney, Jr., Edward J. ;

Primary / Asst. Examiners: Chapnick, Melvin B.;

INPADOC Legal Status: Show legal status actions

Family: None

First Claim:
Show all 8 claims
What is claimed is:     1. In a stored logic, Boolean function generator comprising an operator storage means for storing a predetermined sequence of Boolean operations, a first memory means and a second memory means for storing binary signals, an output storage means and circuitry means coupled to said operator storage means, said first memory means and said second memory means, and said output storage means, a method for performing a Boolean function by executing said predetermined sequence of Boolean operations stored in said operator storage means by successively configuring said circuitry means to execute said predetermined sequence of Boolean operations on said binary signals as they are transferred between said first memory means and said second memory means via said configured circuitry means, said method comprising the steps of:
  • (1) loading said predetermined sequence of Boolean operations into said operator storage means;
  • (2) loading said binary signals into said first memory means;
  • (3) transferring one of said sequence of Boolean operations from said operator storage means to said circuitry means;
  • (4) executing said transferred Boolean operation in said circuitry means upon said binary signals stored in said first memory means and storing the operational results in said second memory means;
  • (5) transferring another of said sequence of Boolean operations from said operator storage means to said circuitry means;
  • (6) executing said another transferred Boolean operation in said circuitry means upon said binary signals stored in said second memory means and restoring the results in said first memory means;
  • (7) continually performing steps (3) - (6) until all of said predetermined sequence of Boolean operations have been executed; and
  • (8) transferring the results of said last performed Boolean operations to said output storage means.


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Forward References: Show 10 U.S. patent(s) that reference this one

       
U.S. References: Go to Result Set: All U.S. references   |  Forward references (10)   |   Backward references (11)   |   Citation Link

Buy
PDF
Patent  Pub.Date  Inventor Assignee   Title
Buy PDF- 9pp US3454310  1969-07 Wilhelm, Jr.   BOOLIAN CONNECTIVE SYSTEM
Buy PDF- 3pp US3458240  1969-07 Hanson   FUNCTION GENERATOR FOR PRODUCING THE POSSIBLE BOOLEAN FUNCTIONS OF ETA INDEPENDENT VARIABLES
Buy PDF- 9pp US3484700  1969-12 Armstrong   ASYNCHRONOUS SEQUENTIAL SWITCHING CIRCUIT USING NO DELAY ELEMENTS
  US3510787  1970-05 Pound et al.   VERSATILE LOGIC CIRCUIT MODULE
  US3611309  1971-10 Zingg  Iowa State University Research Foundation, Inc. LOGICAL PROCESSING SYSTEM
  US3619583  1971-11 Arnold  Bell Telephone Laboratories Incorporated MULTIPLE FUNCTION PROGRAMMABLE ARRAYS
Buy PDF- 15pp US3783254  1974-01 Eichelberger  International Business Machines Corporation LEVEL SENSITIVE LOGIC SYSTEM
Buy PDF- 20pp US3816725  1974-06 Greer  General Electric Company MULTIPLE LEVEL ASSOCIATIVE LOGIC CIRCUITS
Buy PDF- 9pp US3902050  1975-08 Schmidt et al.  Siemens Aktiengesellschaft Serial programmable combinational switching function generator
Buy PDF- 21pp US3934231  1976-01 Armstrong  Dendronic Decisions Limited Adaptive boolean logic element
Buy PDF- 10pp US4001789  1977-01 Sweet  ITT Industries, Inc. Microprocessor Boolean processor
       
Foreign References: None

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