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 Title: |
US4692738:
Analog signal processing apparatus
[ Derwent Title ]
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| Country: |
US United States of America
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| Inventor: |
Suzuki, Seigo; Tokyo, Japan
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| Assignee: |
Kabushiki Kaisha Toshiba, Kawasaki, Japan
other patents from TOSHIBA CORPORATION (581270) (approx. 23,590)
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| Published / Filed: |
1987-09-08
/ 1985-03-13
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| Application Number: |
US1985000711382
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| IPC Code: |
Advanced:
G06F 3/05;
G06G 7/26;
G06J 1/00;
H03M 1/00;
H03M 1/10;
Core:
G06G 7/00;
more...
IPC-7:
G06G 7/12;
G06J 1/00;
H03K 13/02;
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| ECLA Code: |
G06F3/05; G06J1/00; H03M1/00; T03M201/02; T03M201/11A; T03M201/11A5A; T03M201/13; T03M201/19D; T03M201/23A; T03M201/23A2B; T03M201/31B; T03M201/31C; T03M201/31N; T03M201/31Q1A; T03M201/41E1; T03M201/42B4; T03M201/42C1; T03M201/42D2A; T03M201/52; T03M201/81B2B;
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| U.S. Class: |
Current:
341/110;
341/133;
341/144;
341/163;
Original:
340/347.C;
340/347.M;
340/347.AD;
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| Field of Search: |
340/347 M,347 C,347 AD
364/602
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| Priority Number: |
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| Abstract: |
An analog signal is input to an A/D converting section. This A/D converting section has a D/A converter therein. The A/D converting section converts the input analog signal to a digital signal. A digital signal processing circuit receives an output signal from the A/D converting section and performs a predetermined process to this signal. A D/A converting section receives and converts an output signal of the digital signal processing circuit to an analog signal. This D/A converting section has a D/A converter with the same circuit arrangement as the D/A converter in the A/D converting section circuit and is constituted by the same circuit pattern. Therefore, the converting functions of the A/D converting section and of the D/A converting section are inverse functions of each other, so that error or distortion, which is caused in the A/D converting section, is automatically corrected when the digital signal is reconverted to the analog signal in the D/A converting section.
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| Attorney, Agent or Firm: |
Finnegan, Henderson, Farabow, Garrett & Dunner ;
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| Primary / Asst. Examiners: |
Shoop, Jr., William M.; Logan, Sharon D.
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| INPADOC Legal Status: |
None
Family Legal Status Report
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| Family: |
Show 2 known family members
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First Claim:
Show all 9 claims |
What is claimed is:
1. An analog signal processing apparatus comprising:
- analog-to-digital converting means for receiving an analog input signal and converting said analog signal to a digital signal in accordance with a predetermined converting function and outputting the digital signal;
- digital signal processing means connected to said analog-to-digital converting means for receiving the output digital signal of said analog-to-digital converting means and performing a predetermined digital signal process upon the output digital signal of said analog-to-digital converting means; and
- digital-to-analog converting means, connected to said digital signal processing means and separate from said analog-to-digital converting means, for receiving and converting the output digital signal of said digital processing means to an output analog signal in accordance with a converting function which is substantially equal to the inverse function of said converting function of said analog-to-digital converting means;
- said analog-to-digital converting means represented by the relationship:
D1 =f(Ai)
- in which Ai is the analog input signal, Di is the digital output signal, and f is the converting function; and said digital-to-analog converting means represented by the relationship:
Aj=f-1 (Dj)
- in which Dj is the output digital signal of the digital signal processing means, Aj is the output analog signal, and f-1 is the converting function substantially equal to the inverse of the converting function f; thereby correcting error occuring when said analog-to-digital converting means converts the input analog signal to the digital signal.
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| Background / Summary: |
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| Drawing Descriptions: |
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| Description: |
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| Forward References: |
Show 12 U.S. patent(s) that reference this one
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