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 Title: |
US6122172:
Polymer stud grid array
[ Derwent Title ]
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| Country: |
US United States of America
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| Inventor: |
Dumoulin, Ann; Zedelgem, Belgium
Heerman, Marcel; Merelbeke, Belgium
Roggen, Jean; Lummen, Belgium
Beyne, Eric; Leuven, Belgium
Hoof, Rita van; Boortmeerbeek, Belgium
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| Assignee: |
Siemens NV, Brussels, Belgium
Interuniversitair Micro-Electronica-Centrum VZW, Leuven, Belgium
other patents from SIEMENS N.V. (756252) (approx. 4)
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| Published / Filed: |
2000-09-19
/ 1998-04-16
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| Application Number: |
US1998000051778
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| IPC Code: |
Advanced:
H01L 23/12;
H01L 23/13;
H01L 23/433;
Core:
H01L 23/34;
more...
IPC-7:
H05K 7/20;
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| ECLA Code: |
H01L23/13; H01L23/433E;
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| U.S. Class: |
Current:
361/719;
174/548;
257/E23.004;
257/E23.092;
361/704;
Original:
361/719;
174/052.2;
361/704;
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| Field of Search: |
361/704,705,707,709-712,717-719
257/705,713
165/80.3,185
174/16.3,252,52.2
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| Priority Number: |
| 1995-10-16 |
DE1995019538464 |
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| Abstract: |
In order to achieve better dissipation of the heat losses, a polymer stud grid array in proposed having
- an injection-molded, three-dimensional substrate (S) composed of an electrically insulating polymer,
- polymer studs (PS) which are arranged over the area on the underneath of the substrate (S) and are integrally formed during injection molding,
- external connections which are formed on the polymer studs (PS) by an end surface which can be soldered,
- conductor runs which are formed at least on the underneath of the substrate (S) and connect the external connections to internal connections,
- at least one heat sink (WL) which is partially coated during the injection molding of the substrate (S), and having
- at least one chip or wiring element (VE) which is arranged on the heat sink (WL) and whose connections are electrically conductively connected to the internal connections.
The new configuration is suitable in particular for power components or power modules in a polymer stud grid array package.
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| Attorney, Agent or Firm: |
Hill & Simpson ;
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| Primary / Asst. Examiners: |
Tolin, Gerald;
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| Maintenance Status: |
E2 Expired Check current status
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| INPADOC Legal Status: |
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Family Legal Status Report
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| Designated Country: |
AT BE CH DE ES FI FR GB IT LI NL EP JP KR US
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| Family: |
Show 9 known family members
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First Claim:
Show all 18 claims |
We claim:
1. A polymer stud grid array comprising:
- an injection-molded substrate fabricated from an electrically insulating polymer, the substrate comprising an underside having at least one integral stud extending downward therefrom,
- the stud having an outside terminal thereon, the outside terminal comprising an end surface which can be soldered, the outside terminal being connected to an an inside terminal by an interconnection, said inside terminal being located on said substrate,
- the substrate being connected to at least one heat sink which is partially coated with the electrically insulating polymer, the heat sink comprising a disk that is partially embedded in the substrate, the heat sink also being connected to at least one wiring element that is connected to the inside terminal.
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| Background / Summary: |
Show background / summary
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| Drawing Descriptions: |
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| Description: |
Show description
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| PCT Number: |
PCT/EP96/04407
WO9715078
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| PCT Pub./Filed Dates: |
1997-04-24 / 1996-10-10
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| § 371 / 102(e) Dates: |
1998-04-16 / 1998-04-16
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| Forward References: |
Show 6 U.S. patent(s) that reference this one
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