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 Title: |
US6192501:
High data rate maximum a posteriori decoder for segmented trellis code words
[ Derwent Title ]
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| Country: |
US United States of America
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| Inventor: |
Hladik, Stephen Michael; Albany, NY
Van Stralen, Nick Andrew; Schenectady, NY
Fergus Ross, John Anderson; Schenectady, NY
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| Assignee: |
General Electric Company, Schenectady, NY
other patents from GENERAL ELECTRIC COMPANY (218550) (approx. 30,796)
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| Published / Filed: |
2001-02-20
/ 1998-08-20
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| Application Number: |
US1998000137181
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| IPC Code: |
Advanced:
H03M 13/27;
H03M 13/29;
H03M 13/39;
Core:
H03M 13/00;
IPC-7:
H03M 13/23;
H03M 13/29;
H03M 13/39;
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| ECLA Code: |
H03M13/39A; H03M13/27; H03M13/29T; H03M13/29T7; H03M13/39;
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| U.S. Class: |
Current:
714/786;
714/755;
714/792;
714/794;
Original:
714/786;
714/755;
714/792;
714/794;
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| Field of Search: |
714/755,786,792,794
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| Priority Number: |
| 1998-08-20 |
US1998000137181 |
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| Abstract: |
In a communications system, a trellis code word is segmented by both the encoder and a segmented MAP decoder. The segmented MAP decoder operates on code word segments as if they were individual code words and takes advantage of knowing the state of the encoder at specified times to reduce decoding latency and required memory. In a turbo coding system, for example, coding gain is maintained by interleaving the information bits across the segments of a component code word.
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| Attorney, Agent or Firm: |
Breedlove, Jill M. ;
Stoner, Douglas E. ;
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| Primary / Asst. Examiners: |
Baker, Stephen M.;
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| Maintenance Status: |
R1 Reinstated
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| INPADOC Legal Status: |
Show legal status actions
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| Family: |
None
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First Claim:
Show all 20 claims |
What is claimed is:
1. A method for encoding digital data into trellis code words, each code word comprising a predetermined number of information bits Icw, generated by a source, the method comprising the steps of:
- (a) setting a predetermined maximum number of information bits in a code word segment Iseg ;
- (b) for each Icw information bits, shifting groups of the information bits generated by the source into an encoder, each group comprising Iseg information bits if there is no remainder of Icw /Iseg information bits, and if there is a remainder of Icw /Iseg information bits, each group except the last group comprising Iseg information bits with the last group comprising the remainder; and
- (c ) shifting a predetermined number of merge symbols into the encoder after each group of information bits shifted into the encoder in order to return the encoder to a predetermined known state.
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| Background / Summary: |
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| Drawing Descriptions: |
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| Description: |
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| Forward References: |
Show 22 U.S. patent(s) that reference this one
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| Foreign References: |
None
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| Other References: |
Benedetto et al., "Performance of Continuous and Blockwise Decoded Turbo Codes", IEEE Communications Letters, vol. 1, No. 3, May 1997, pp. 77-79.
"Illuminating the Structure of Code and Decoder of Parallel Concatenated Recursive Systematic (Turbo) Codes," Patrick Robertson, IEEE, 1994, pp. 1298-1303.
"Optimal Decoding of Linear Codes for Minimizing Symbol Error Rate," LR Bahl, J Cocke, F. Jelinek; J. Raviv, IEEE Transactions on Information Theory, Mar. 1974, pp. 284-287.
(4 pages)
Cited by 99 patents
"Near Shannon Limit Error-Correcting Coding and Decoding: Turbo-Codes (1)," Claude Berrou, Alain Glavieux; Punya Thitimajshima, IEEE, 1993, pp. 1064-1070.
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