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 Title: |
EP0363086B1:
Mask programmable bus control gate array[German][French]
[ Derwent Title ]
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Country:
Kind: |
EP European Patent Office (EPO)
B1 PATENT SPECIFICATION i
(See also:
EP0363086A2,
EP0363086A3 )
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| Inventor: |
Akins, Joseph Franklin;
Goddard, Donald Girdham;
Goszewski, Cynthia Paulette;
Haacke, Ernest David;
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| Assignee: |
ADVANCED MICRO DEVICES, INC.
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| Published / Filed: |
1996-06-12
/ 1989-09-29
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| Application Number: |
EP1989000309931
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| IPC Code: |
Advanced:
G06F 13/40;
H03K 19/018;
H03K 19/173;
Core:
more...
IPC-7:
G06F 13/40;
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| ECLA Code: |
G06F13/40D5; H03K19/018B; H03K19/018B2; H03K19/173C1;
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| Priority Number: |
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| Abstract: |
[From equivalent
EP0363086A2]
A customizable communications bus control gate array for facilitating communications between devices on two disparate digital communications channels.The gate array has a mask programmable integrated circuit with two I/O interface devices which are respectively connected to two different communications channels. The gate array also has a translating device connected to each of the I/O interface devices for translating electrical signals therebetween. Logic control is also provided and connected to both of the I/O interface devices and to the translating device for controlling operations thereof so that predetermined communications reguirements between both of the disparate communications channels are satisfied.
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| Attorney, Agent or Firm: |
Sanders, Peter Colin Christopher et al ;
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| INPADOC Legal Status: |
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Family Legal Status Report
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| Designated Country: |
AT BE CH DE ES FR GB GR IT LI LU NL SE
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| Family: |
Show 10 known family members
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First Claim:
Show all claims |
1. A system for interfacing two disparate digital communication channels, the system translating electrical signals passing between the two channels (10, 12) from a first standard logic associated with a first of the channels to a second standard logic associated with the second channel, characterised in that the system comprises an integrated circuit (50) having a mask programmable array of logic gates (58) and first and second customizable I/O interface means (54, 56) respectively connected between the array of logic gates and the first and second communication channels (10, 12).
[German]
[French]
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Description
Expand description |
The present invention relates to a bus control gate array and, more particularly, to a mask programmable communications bus control gate array that can be customized for use between two disparate communications channels.
+ DESCRIPTION OF THE PREFERRED EMBODIMENT
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| Other Abstract Info: |
DERABS G1990-109408
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