 |
|
|
|
|
|
 Title: |
US4677890:
Sound interface circuit
[ Derwent Title ]
|
| Country: |
US United States of America
|
| |
| Inventor: |
Yannes, Robert J.; Media, PA
|
| Assignee: |
Commodore Business Machines Inc., West Chester, PA
other patents from COMMODORE BUSINESS MACHINES INC. (113505) (approx. 17)
News, Profiles, Stocks and More about this company
|
| Published / Filed: |
1987-07-07
/ 1983-02-27
|
| Application Number: |
US1983000455974
|
| IPC Code: |
Advanced:
G10H 1/12;
Core:
G10H 1/06;
IPC-7:
G10H 1/12;
G10H 1/46;
|
| U.S. Class: |
Current:
084/661;
084/663;
084/DIG.009;
984/327;
Original:
084/001.19;
084/001.27;
084/DIG.9;
|
| Field of Search: |
084/1.01,1.19,1.27,DIG. 9
|
| Priority Number: |
| 1983-02-27 |
US1983000455974 |
|
| Abstract: |
A sound interface circuit is implemented in large scale integrated circuitry (LSI) on a single chip to provide 3 voice electronic music synthesizer/sound effects, and is compatible with instructions from commercially available microprocessors; whereof a wide range, high-resolution control of pitch (frequency) tone color (harmonic content) and dynamics (volume) is achieved and specialized control circuitry minimizes software overhead, facilitating use in arcade/home video games and low cost musical instruments.
|
| Attorney, Agent or Firm: |
Simkanich, John J. ;
|
| Primary / Asst. Examiners: |
Witkowski, S. J.;
|
| INPADOC Legal Status: |
Show legal status actions
|
| Family: |
None
|
First Claim:
Show all 8 claims |
What is claimed is:
1. A sound interface circuit for selectively generating a plurality of voices, for use in a home video game circuit, said name circuit having a programmable microprocessor holding digital instruction signals, analog game player inputs and providing a first and second non-overlapping clock pulses, comprising:
- data buffer circuit means for receiving said miroprocessor instruction signals for providing control instructions;
- a data bus connected to said buffer means for carrying said control instructions connected from said data buffer means;
- a means connected to said analog game play inputs for analog to digital transformation of each said analog player input to digital player instructions, said player instructions being fed to said data bus;
- a first, second and third tone oscillator circuit means, each individually operated and independently structured, for each providing a separate tone frequency according to a digital instruction signals from said data bus;
- a first, second and third envelope generator circuit means each individually operated and independently structured for each providing a frequency envelope format according to a digital instruction signals from said data bus;
- a first, second and third amplitude modulator circuit means, each independently structured for each providing an amplitude modulated signal, said first modulator circuit means being connected to said first tone oscillator circuit means and said first envelope generator circuit means, said second modulator circuit means being connected to said second tone oscillator circuit means and said second envelope generator circuit means, said third modulator circuit means being connected to said third tone oscillator circuit means and said third envelope generator means;
- a digital filter circuit means for shaping a signal, said digital filter circuit means operating according to digital instruction signals from said data bus and being connected thereto;
- a volume controller connected on said digital filter signals circuit means output and operative according to a digital instruction from said data bus; and being connected thereto; and
- switch circuit means for selectively interconnecting any of said first, second and third amplitude modulator circuit means outputs with said digital filter means.
|
| Background / Summary: |
Show background / summary
|
| Drawing Descriptions: |
Show drawing descriptions
|
| Description: |
Show description
|
| Forward References: |
Show 11 U.S. patent(s) that reference this one
|
