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 Title: |
US4980857:
Operations controller for a fault tolerant multiple node processing system
[ Derwent Title ]
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| Country: |
US United States of America
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| Inventor: |
Walter, Chris J.; Columbia, MD
Kieckhafer, Roger M.; Lincoln, NE
Finn, Alan M.; Amston, CT
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| Assignee: |
Allied-Signal Inc., Morris Township, Morris County, NJ
other patents from ALLIED-SIGNAL INC. (19715) (approx. 6,414)
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| Published / Filed: |
1990-12-25
/ 1989-06-07
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| Application Number: |
US1989000362957
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| IPC Code: |
Advanced:
G06F 9/46;
G06F 9/50;
G06F 11/00;
G06F 11/18;
G06F 11/20;
G06F 15/16;
G06F 11/10;
Core:
more...
IPC-7:
G06F 9/00;
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| ECLA Code: |
G06F11/18V4; G06F9/48C4S; G06F11/00C3; G06F11/18E; G06F11/18M; G06F11/18V; G06F15/16D; S06F11/00B2; S06F11/10; S06F11/18; S06F11/18E; S06F11/18M;
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| U.S. Class: |
Current:
714/045;
714/048;
714/E11.016;
718/100;
718/102;
719/310;
Original:
364/900;
364/943.9;
364/948.3;
364/948.1;
364/931.4;
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| Field of Search: |
364/200,900
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| Priority Number: |
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| Abstract: |
A task communicator for each node in a multiple node processing system having a data memory storing data received from a voter interface which is used for the execution of tasks by an associated applications processor, a next task register storing the identification code of the next task to be executed by the applications processor received from a scheduler through a scheduler interface. An input handler passes the identification code of the next task and the data required for the execution of that task to an input FIFO register interfacing the applications processor. An output FIFO register temporarily stores the data generated by the applications processor and an output handler generates inter-node messages containing data stored in the output FIFO and passes these inter-node messages to a transmitter through a transmitter interface for transmission to all of the other nodes in the processing system.
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| Attorney, Agent or Firm: |
Massung, Howard G. ;
Walsh, Robert A. ;
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| Primary / Asst. Examiners: |
Shaw, Gareth D.; Mills, John G.
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| Maintenance Status: |
CC Certificate of Correction issued
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| INPADOC Legal Status: |
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Family Legal Status Report
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| Parent Case: |
This is a division of application Ser. No. 038,813, filed Apr. 15, 1987.
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| Designated Country: |
DE FR GB IT EP JP
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| Family: |
Show 11 known family members
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First Claim:
Show all 14 claims |
What is claimed is:
1. In a multiple node processing system having a plurality of nodes, each node having an applications processor operative to execute a predetermined set of tasks wherein each task in said predetermined set of tasks is executed by more than one node, and an operations controller for selecting the tasks in the order that they are to be executed by the applications processor, the operations controller further controlling the operation of its own node through the exchange of inter-node messages including data value messages, each containing data resulting from the execution of a task by the node that sent said data value message and task completed/started messages identifying the task just completed and the new task started by the node sending said task completed/started message, said data value messages including a message type code identifying the message as containing data values, and a data identification code uniquely identifying the particular data value, the operations controller having a plurality of subsystems including a receiver for receiving said data value messages and said task completed/started messages generated by said other nodes, a task scheduler for selecting and scheduling the tasks to be executed by said applications processor for generating a task identification code identifying the next task to be executed by said applications processor and a task terminated signal in response to receiving inter-node data value messages from all the nodes scheduled to execute the task containing the identity of the terminated task, and a task communicator for transferring to said applications processor the identity of the task selected by said task scheduler and the data values required for the execution of the task selected and for generating said data value messages and said task completed/started messages which are sent to all of the nodes in said multiple node processing system, said task communicator comprising:
- a data memory for storing data values, said data memory having at least two partitions identified by a context bit, each partition having a plurality of entries for storing said data values;
- a context bit memory for storing a context bit for each data identification code, said context bit identifying said data values stored in said data memory which are ready for use in the execution of tasks by said applications processor;
- a task terminated recorder for complementing said context bit in said context bit memory in response to said task terminated signal generated by said task scheduler;
- a store data control for storing said data values contained in said data value messages received by said receiver in said data memory using said message type code, data identification code and the complement of said context bit stored in said context bit memory associated with said data identification code for said data value as an address for the appropriate entry in said data memory;
- a next task register for storing said task identification code of a task selected by said task scheduler for execution by said applications processor;
- an input FIFO register accessible by said applications processor for storing said task identification code of the next task to be executed by said applications processor and said data values required for the execution of said next task;
- input handler means, responsive to said applications processor completing the preceding task for generating a task completed/started message sent to all of the nodes in said multiple node processing system, for transferring said task identification code stored in said next task register to said input FIFO register, and for accessing said data memory for said data values required for the execution of said next task and store said data values in said input FIFO register, said input handler means responsive to said context bits stored in said context bit memory to identify which data values in said data memory are to be transferred to said input FIFO register for the execution of said next task;
- an output FIFO register for storing said data values generated by said applications processor during the execution of each task; and
- output handler means for generating said data value messages which are sent to all the nodes in said multiple node processing system, said data value messages containing said data values stored in said output FIFO register and said identification code for said data values.
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| Background / Summary: |
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| Drawing Descriptions: |
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| Description: |
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| Forward References: |
Show 65 U.S. patent(s) that reference this one
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