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 Title: |
US5574448:
Method and apparatus for encoding data with variable block lengths
[ Derwent Title ]
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| Country: |
US United States of America
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| Inventor: |
Weng, Lih-Jyh; Shrewsbury, MA
DeRoo, John; Marlborough, MA
Leis, Michael; Framingham, MA
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| Assignee: |
Quantum Corporation, Milpitas, CA
other patents from QUANTUM CORP. (CA) (460700) (approx. 382)
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| Published / Filed: |
1996-11-12
/ 1995-05-08
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| Application Number: |
US1995000436980
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| IPC Code: |
Advanced:
G06T 9/00;
G11B 20/14;
H03M 5/14;
H03M 7/14;
H03M 13/00;
H03M 13/31;
Core:
H03M 5/00;
more...
IPC-7:
H03M 7/46;
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| ECLA Code: |
G06T9/00S; G11B20/14A2B; H03M5/14B; H03M13/31;
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| U.S. Class: |
Current:
341/059;
382/245;
G9B/020.041;
Original:
341/059;
382/245;
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| Field of Search: |
341/059,50
400/261.1
384/034
382/245
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| Priority Number: |
| 1995-05-08 |
US1995000436980 |
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| Abstract: |
An encoding system uses a modified 8/9 rate modulation code to encode 8-bit data symbols into 9-bit cells in a conventional manner in accordance with the modified code and 9-bit ECC symbols into 10-bit cells by (i) encoding 8 bits of the symbol into a 9-bit cell in accordance with the modified code, and (ii) inserting into the 9-bit cell the remaining, that is, the non-encoded, bit of the ECC symbol. The system reproduces the 8-bit data symbols by decoding the 9-bit cells in a conventional manner in accordance with the modified code, and the 9-bit ECC symbols by (i) removing from the associated 10-bit cell the bit inserted during encoding, (ii) decoding the remaining 9 bits to reproduce 8 bits of the symbol, and (iii) inserting into the 8 bits the bit that was earlier removed. In an exemplary embodiment, the 8 least significant bits of the ECC symbol are encoded using the modified 8/9 rate code. The 9 bits produced by the code are used essentially as the first "c" bits and last "10-c" bits of a 10-bit cell. The most significant bit of the ECC symbol is included in the cell as the c+1st bit. The mapping of 8 bits to 9-bit cells is such that the inclusion of this c+1st bit does not violate the code's run length limitations, either within the cell or within a modulation code word, which is a concatenation of the cells. The system can similarly encode, using a modified n/m rate code, n-bit and (n+i)-bit symbols, where (n+i)
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| Attorney, Agent or Firm: |
Harrison, David B. ;
Sheehan, Patricia A. ;
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| Primary / Asst. Examiners: |
Young, Brian K.;
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| Maintenance Status: |
E3 Expired Check current status
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| INPADOC Legal Status: |
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Family Legal Status Report
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| Designated Country: |
DE FR GB IT NL EP JP KR SG
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| Family: |
Show 8 known family members
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First Claim:
Show all 17 claims |
What is claimed is:
1. An encoding system for encoding b-bit symbols and e-bit symbols using a modified n/m rate run length limited modulation code that limits the run length of consecutive zero's to z and consecutive one's to r, the system including:
- A. a modulation code encoder for encoding a b-bit symbol or b bits of an e-bit symbol to form an n-bit cell;
- B. a cell manipulator for producing, from an n-bit cell associated with an e-bit symbol, an (m+i)-bit cell that satisfies the run length limitations of the modulation code, the manipulator inserting into the n-bit cell the i=e-b bits of the associated e-bit symbol that the encoder refrained from encoding; and
- C. means for producing a modulation code word by concatenating the n-bit cells associated with the b-bit symbols, and the (m+i)-bit cells associated with the e-bit symbols.
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| Background / Summary: |
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| Drawing Descriptions: |
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| Description: |
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| Forward References: |
Show 5 U.S. patent(s) that reference this one
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