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 Title: |
US5850093:
Uni-directional flash device
[ Derwent Title ]
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| Country: |
US United States of America
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| Inventor: |
Tarng, Huang Chang; San Jose, CA 95129
Tarng, Min Ming; San Jose, CA 95129
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| Assignee: |
None
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| Published / Filed: |
1998-12-15
/ 1997-07-14
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| Application Number: |
US1997000892358
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| IPC Code: |
Advanced:
H01L 27/088;
H01L 27/115;
H01L 29/08;
H01L 29/10;
H01L 29/78;
H01L 29/788;
Core:
H01L 27/085;
H01L 29/02;
H01L 29/66;
more...
IPC-7:
H01L 27/10;
H01L 29/78;
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| ECLA Code: |
H01L27/088; H01L27/115; H01L29/08E2; H01L29/10D2B1; H01L29/78C; H01L29/788B4;
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| U.S. Class: |
Current:
257/327;
257/335;
257/345;
257/654;
257/E27.06;
257/E27.103;
257/E29.04;
257/E29.052;
257/E29.262;
257/E29.304;
Original:
257/327;
257/335;
257/345;
257/654;
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| Field of Search: |
257/329,327,345,653,654,335
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| Priority Number: |
| 1997-07-14 |
US1997000892358 |
| 1995-04-10 |
US1995000419503 |
| 1992-09-09 |
US1992000932916 |
| 1989-11-20 |
US1989000439200 |
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| Abstract: |
The flash device is a field effect single cell device. The flash device has the source laying under the gate. The variance of gate voltage has the direct capacitor coupling and current injecting effects with the source to speed up the response of circuit. Furthermore, the process of the flash device is comparable with the CMOS device. It is an ideal device for the output buffer which has the anti-ground-bounce and anti-power-droop capabilities. The single cell technology is applied to the single cell active pixel to integrate four different components into one cell. The versatile operation is applied to have the super-flash EEPROM.
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| Primary / Asst. Examiners: |
Monin, Jr., Donald L.;
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| Maintenance Status: |
E1 Expired Check current status
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| INPADOC Legal Status: |
Show legal status actions
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| Related Applications: |
| Application Number |
Filed |
Patent |
Pub. Date |
Title |
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| US1995000419503 | 1995-04-10 |
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| US1992000932916 | 1992-09-09 |
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| US1989000439200 | 1989-11-20 |
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| Parent Case: |
This is a continuation-in-part of Ser. No. 08/419,503, filed Apr. 10, 1995, now abandoned, which is a continuation-in-part of Ser. No. 07/932,916, filed Sep. 9, 1992, now abandoned, which is a continuation-in-part of Ser. No. 07/439,200, filed Nov. 20, 1989 now abandoned.
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| Family: |
None
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First Claim:
Show all 71 claims |
We claim:
1. A semiconductor device(FIG. 21A) comprising:
- a first semiconductor region of first conductivity type, said first semiconductor region having a major surface;
- second and third regions of second conductivity type in said first region, said third region being L shape region having a vertical segment and a horizontal segment, said second and said vertical segment of said third regions each adjoining said major surface, said third region being spaced from said second region by a portion of said first region, said horizontal segment of said third region buried inside said first region and under said major surface,
- a gate electrode insulatingly overlaying a portion of said first region and right above the buried horizontal segment of said third region,
- a drain electrode connected to said second region and a source electrode connected to said third region,
- said second region having a portion laying under said gate, said vertical segment of said third region being away from said gate to have a single-side offset with said gate to form a surface drainage to drain carriers to elinimate electric shield formed by carriers that electric field of said gate being able to reach bulk portion of said first semiconductor region to form a bulk channel(FIG. 23A and FIG. 23B), but said third region having the buried horizontal segment laying directly under said gate,
- whereby said structure forms a field effect transistor with said gate controlling the a buried portion and an interface between said buried portion and a channel portion, said channel portion of said first region being formed under the applied voltage of said gate to allow current flowing only from the buried portion of said third region to said second region.
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| Background / Summary: |
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| Drawing Descriptions: |
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| Description: |
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| Forward References: |
Show 9 U.S. patent(s) that reference this one
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