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Title: US5870109: Graphic system with read/write overlap detector
[ Derwent Title ]


Country: US United States of America

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12 pages

 
Inventor: McCormack, Joel J.; Boulder, CO
Gianos, Christopher C.; Sterling, MA
Hoar, Andrew V.; Wilton, NH
Seiler, Larry D.; Boylston, MA
Jouppi, Norman P.; Palo Alto, CA
Claffey, James T.; Groton, MA

Assignee: Digital Equipment Corporation, Maynard, MA
other patents from DIGITAL EQUIPMENT CORPORATION (147695) (approx. 2,345)
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Published / Filed: 1999-02-09 / 1997-06-06

Application Number: US1997000870482

IPC Code: Advanced: G06T 7/00; G09G 5/377; G09G 5/39; G09G 5/393;
Core: G09G 5/36; more...
IPC-7: G09G 5/36;

ECLA Code: G09G5/393;

U.S. Class: Current: 345/565; 345/531;
Original: 345/515; 345/521;

Field of Search: 345/191,509,515,521,523-525 711/001,212,3

Priority Number:
1997-06-06  US1997000870482

Abstract:     A graphics system for storing and editing graphic images represented by digital data, includes a frame memory for storing pixel data representing graphic images including first and second graphic objects. The pixel data is stored at addresses, each being associated with one or more graphic fragment forming the first and second graphic objects. First and second addresses are respectively associated with those of the graphic fragments forming the first and second graphic objects. A memory controller controls writing and reading the pixel data to and from the frame memory. A fragment editor is provided to receive the pixel data read from the first address and modify the associated fragment with the received pixel data so as to form modified pixel data. An address detector detects the first address responsive to a request to read the pixel data from the first address and the second address responsive to a subsequent request to read pixel data from the second address. The detector compares the detected first and second addresses to identify an overlap of the first and second graphic objects. If an overlap is identified, the controller controls the writing of the modified pixel data to the first address before the reading of the pixel data from the second address.

Primary / Asst. Examiners: Tung, Kee M.;

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Designated Country: DE FR GB IT NL 

Family: Show 4 known family members

First Claim:
Show all 23 claims
We claim:     1. A graphics system for storing and editing graphic images represented by digital data, comprising:
  • a frame memory configured to store, at a plurality of addresses, pixel data representing graphic images including a first graphic object and a second graphic object, each of the plurality of addresses being associated with one or more of a plurality of graphic fragments forming the first graphic object and the second graphic object, and a first of the plurality of addresses being associated with a first of the plurality of graphic fragments forming the first graphic object and a second of the plurality of addresses being associated with a second of the plurality of graphic fragments forming the second graphic object;
  • a memory controller configured to control writing of the pixel data to the frame memory, and reading of the pixel data stored in the frame memory;
  • a fragment editor configured to receive the pixel data read from the first address and to modify the associated fragment with the read pixel data so as to form modified pixel data; and
  • an address detector configured to detect the first address responsive to a request to read the pixel data from the first address, to detect the second address responsive to a subsequent request to read the pixel data from the second address, to compare the detected second address with the detected first address and to identify an overlap of the first graphic object and the second graphic object if the first address and the second address are identical;
  • wherein, if an overlap is identified, the controller controls the writing and the reading of the pixel data such that the modified pixel data is written to the first address of the frame memory before the pixel data is read from the second address of the frame memory.


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Forward References: Show 29 U.S. patent(s) that reference this one

       
U.S. References: Go to Result Set: All U.S. references   |  Forward references (29)   |   Backward references (3)   |   Citation Link

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PDF
Patent  Pub.Date  Inventor Assignee   Title
Buy PDF- 21pp US5502825  1996-03 Nishimukai et al.  Hitachi, Ltd. Data processing system with an enhanced cache memory control
Buy PDF- 23pp US5706482  1998-01 Matsushima et al.  NEC Corporation Memory access controller
Buy PDF- 43pp US5742796  1998-04 Huxley  3Dlabs Inc. Ltd. Graphics system with color space double buffering
       
Foreign References: None

Other Abstract Info: DERABS G99-011885

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