Work Files Saved Searches
   My Account                                                  Search:   Quick/Number   Boolean   Advanced   Derwent    Help   


 The Delphion Integrated View

  Buy Now:   Buy PDF- 15pp  PDF  |   File History  |   Other choices   
  Tools:  Citation Link  |  Add to Work File:    
  View:  Expand Details   |  INPADOC   |  Jump to: 
  Go to:  Derwent  
 Email this to a friend  Email this to a friend 
       
Title: US6097244: Highly-linear continuous-time filter for a 3-volt supply with PLL-controlled resistor and digitally-controlled capacitor
[ Derwent Title ]


Country: US United States of America

View Images High
Resolution

 Low
 Resolution

 
15 pages

 
Inventor: Chen, Xiaole; Milpitas, CA

Assignee: Centillium Communications, Inc., Fremont, CA
other patents from CENTILLIUM COMMUNICATIONS, INC. (771192) (approx. 9)
 News, Profiles, Stocks and More about this company

Published / Filed: 2000-08-01 / 1998-12-17

Application Number: US1998000215508

IPC Code: Advanced: H03H 11/04; H03H 19/00; H03J 7/04; H03L 7/06;
Core: H03J 7/02; more...
IPC-7: H04B 1/10;

ECLA Code: H03H11/04; H03H19/00B; H03J7/04; H03L7/06;

U.S. Class: Current: 327/553; 327/308; 327/552; 327/556; 327/557; 327/558;
Original: 327/553; 327/552; 327/308; 327/558; 327/557; 327/556;

Field of Search: 327/308,552,553,362 330/305,303

Priority Number:
1998-12-17  US1998000215508

Abstract: A continuous-time filter is highly linear even when used with reduced 3-volt power supplies. In each stage of a multi-stage ladder network, resistor networks are attached to each input of a differential op amp. Each resistor network uses fixed resistors in series between the inputs and an intermediate node, and a fixed input resistor between the intermediate node and the op-amp input. The fixed input resistor improves linearity compared with a linear transistor. A transistor connects the internal node to ground, acting as a variable resistor to adjust the equivalent resistance of the resistor network. A control voltage applied to the gate of the transistor is generated by an analog control loop. The control voltage is the voltage input to a voltage-controlled oscillator (VCO) in a phase-locked loop (PLL). The analog PLL control loop adjusts the control voltage and the resistance continuously as the filter operates. A voltage comparator detects when the control voltage is out of a range, activating a calibration signal. Filtering stops and a digital successive-approximation register adjusts capacitances of feedback capacitors around the op amps. The capacitance in the VCO is also adjusted, changing the control voltage. Capacitance converges to the desired value by comparing the control voltage to a mid-range target voltage.

Attorney, Agent or Firm: Auvinen, Stuart T. ;

Primary / Asst. Examiners: Lam, Tuan T.; Nguyen, Hiep

INPADOC Legal Status: Show legal status actions

Family: None

First Claim:
Show all 18 claims
I claim:     1. A highly-linear ladder filter that adjusts resistance comprising:
  • a plurality of filter stages, each filter stage having:
    • an op amp with a pair of op-amp inputs, for amplifying a voltage difference between the pair of op-amp inputs to generate op-amp outputs;
    • a pair of feedback capacitors, each feedback capacitor connecting an op-amp output to an op-amp input;
    • a pair of resistor networks, each resistor network connecting a stage input to an op-amp input with an equivalent resistance, the equivalent resistance being continuously adjusted by a control voltage;
    • wherein each resistor network includes:
      • a first fixed resistor, connecting the stage input to an intermediate node;
      • a fixed input resistor, connecting the intermediate node to the op-amp input;
      • a variable resistor, connecting the intermediate node to a ground node, the variable resistor having a resistance controlled by the control voltage;
      • wherein the variable resistor is a transistor biased in a linear region of operation by the control voltage applied to a gate of the transistor, wherein a drain of the transistor is connected to the intermediate node and wherein a source of the transistor is connected to the ground node: and
  • an analog control loop for generating the control voltage
  • whereby the control voltage adjusts channel resistance through the transistor and whereby linearity is improved by using the fixed input resistor connected to the op-amp input while the equivalent resistance of the resistor network is adjusted with the control voltage by the variable resistor to the ground node.


Background / Summary: Show background / summary

Drawing Descriptions: Show drawing descriptions

Description: Show description

Forward References: Show 10 U.S. patent(s) that reference this one

       
U.S. References: Go to Result Set: All U.S. references   |  Forward references (10)   |   Backward references (8)   |   Citation Link

Buy
PDF
Patent  Pub.Date  Inventor Assignee   Title
Buy PDF- 7pp US3772617  1973-11 Ciesielka  Bell Telephone Laboratories, Incorporated METHOD AND ARRANGEMENT FOR SETTING THE REMANENT FLUX DENSITY IN MAGNETIC CIRCUITS AND EQUALIZER UTILIZING SAME
Buy PDF- 5pp US4626808  1986-12 Nossek  Siemens Aktiengesellschaft Electrical filter circuit for processing analog sampling signals
Buy PDF- 11pp US4918338  1990-04 Wong  North American Philips Corporation Drain-biassed transresistance device for continuous time filters
Buy PDF- 24pp US5262779  1993-11 Sauer  David Sarnoff Research Center, Inc. Analog to digital converter
Buy PDF- 10pp US5345119  1994-09 Khoury  AT&T Bell Laboratories Continuous-time filter tuning with a delay-locked-loop in mass storage systems or the like
Buy PDF- 9pp US5492935  1996-02 Okanobu   Compositions comprising retinal and derivatives thereof for treatment of cosmetic or dermatologic skin disorders
Buy PDF- 13pp US5608665  1997-03 Wyszynski   Self-tuned, continuous-time active filter
Buy PDF- 18pp US5729230  1998-03 Jensen et al.  Hughes Aircraft Company Delta-Sigma Δ-.SIGMA. modulator having a dynamically tunable continuous time Gm-C architecture
       
Foreign References: None

Other Abstract Info: DERABS G2000-601190 DERABS G2000-601190

Other References:
  • Banu, M and Tsividis, Y., "An Elliptic Continuous-Time CMOS Filter with On-Chip Automatic Tuning" IEEE JSSC vol. SC-20, No. 6, pp 1114-21, Dec. 1985. (8 pages) Cited by 6 patents
  • Moon and Song, "Design of a Low-Distortion 22-KHz Fifth-Order Bessel Filter" IEEE JSSC vol. 28, No. 12, pp 1254-64, Dec. 1993. (11 pages) Cited by 8 patents [ISI abstract]
  • Durham and Redman-White, "Integrated Continuous-Time Balanced Filters for 16-b DSP Interfaces" IEEE JSSC vol. 28, No. 7, pp 835-39, Jul. 1993. (5 pages) Cited by 4 patents [ISI abstract]


  • Inquire Regarding Licensing

    Powered by Verity


    Plaques from Patent Awards      Gallery of Obscure PatentsNominate this for the Gallery...

    Thomson Reuters Copyright © 1997-2010 Thomson Reuters 
    Subscriptions  |  Web Seminars  |  Privacy  |  Terms & Conditions  |  Site Map  |  Contact Us  |  Help