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Title: US6109777: Division with limited carry-propagation in quotient accumulation
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Country: US United States of America

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21 pages

 
Inventor: Jouppi, Norman P.; Palo Alto, CA
McCormack, Joel J.; Boulder, CO
Zurawski, John H.; Boxborough, MA

Assignee: Compaq Computer Corporation, Houston, TX
other patents from COMPAQ COMPUTER CORPORATION, INC. (755619) (approx. 2,058)
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Published / Filed: 2000-08-29 / 1997-04-16

Application Number: US1997000834412

IPC Code: Advanced: G06F 7/52; G06F 7/535;
Core: G06F 7/48;
IPC-7: G06F 7/52;

ECLA Code: G06F7/535; S06F7/537S;

U.S. Class: Current: 708/656;
Original: 364/767;

Field of Search: 364/767,766

Priority Number:
1997-04-16  US1997000834412

Abstract:     A computing system performs non-restoring division. Quotient selection logic selects quotient digits that are used to produce a final quotient. The quotient digits are selected according to a predetermined relationship among certain bits of the divisor and the partial remainder. Only non-zero quotient digits are selected. A quotient accumulator combines each selected quotient digit with a current partial quotient concurrently while each quotient digit is selected. The quotient digits are selected and combined until the final quotient is produced.

Attorney, Agent or Firm: Cesari and McKenna ;

Primary / Asst. Examiners: Malzahn, David H.;

INPADOC Legal Status: Show legal status actions

Family: None

First Claim:
Show all 17 claims
What is claimed is:     1. An apparatus for performing non-restoring division, comprising:
  • means for selecting digits to be used in producing a final quotient, the means for selecting operating to select only digits that have a non-zero value and selecting digits until a final quotient is produced; and
  • means for combining each selected digit with a current partial quotient to produce a new current partial quotient.


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Forward References: Show 2 U.S. patent(s) that reference this one

       
U.S. References: Go to Result Set: All U.S. references   |  Forward references (2)   |   Backward references (11)   |   Citation Link

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PDF
Patent  Pub.Date  Inventor Assignee   Title
Buy PDF- 16pp US4724529  1988-02 Irukulla et al.  Prime Computer, Inc. Method and apparatus for numerical division
Buy PDF- 17pp US5128891  1992-07 Lynch et al.  Advanced Micro Devices, Inc. High speed divider with square root capability
Buy PDF- 20pp US5132925  1992-07 Kehl et al.  Digital Equipment Corporation Radix-16 divider using overlapped quotient bit selection and concurrent quotient rounding and correction
Buy PDF- 9pp US5177703  1993-01 Mori  Kabushiki Kaisha Toshiba Division circuit using higher radices
Buy PDF- 12pp US5258944  1993-11 Smith  Cray Research, Inc. High performance mantissa divider
Buy PDF- 18pp US5270962  1993-12 Fettweis  Teknekron Communications Systems, Inc. Multiply and divide circuit
Buy PDF- 15pp US5357455  1994-10 Sharangpani et al.  Intel Corporation Floating point remainder generator for a math processor
Buy PDF- 21pp US5377135  1994-12 Kuroiwa  Fujitsu Limited High cardinal number type non-restoring divider reducing delay time for adding two numbers
Buy PDF- 15pp US5404324  1995-04 Colon-Bonet  Hewlett-Packard Company Methods and apparatus for performing division and square root computations in a computer
Buy PDF- 25pp US5504915  1996-04 Rarick  Hyundai Electronics America Modified Wallace-Tree adder for high-speed binary multiplier, structure and method
Buy PDF- 10pp US5673215  1997-09 Tsay  International Business Machines Corporation Non-restoring fixed-point divider apparatus
       
Foreign References: None

Other References:
  • "SRT Division Diagrams and Their Usage in Designing Custom Integrated Circuits for Division," Williams et al., Stanford Unvi. Technical Report, 1986.
  • "Computer Architecture: A Quantitative Approach," Second Ed., Patterson et al., Morgan Kaufmann Publishers Inc., San Francisco, Calif.


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