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 Title: |
US6114876:
Translator switch transistor with output voltage adjusted to match a reference by controlling gate and substrate charge pumps
[ Derwent Title ]
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| Country: |
US United States of America
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| Inventor: |
Kwong, David; Fremont, CA
Hui, Alex Chi-Ming; Los Altos, CA
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| Assignee: |
Pericom Semiconductor Corp., San Jose, CA
other patents from PERICOM SEMICONDUCTOR CORP. (713978) (approx. 58)
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| Published / Filed: |
2000-09-05
/ 1999-05-20
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| Application Number: |
US1999000315775
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| IPC Code: |
Advanced:
H03K 19/0185;
Core:
more...
IPC-7:
H03K 19/0175;
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| ECLA Code: |
H03K19/0185B;
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| U.S. Class: |
Current:
326/081;
326/068;
Original:
326/081;
326/068;
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| Field of Search: |
326/081,57,68,80,62,83
327/157,363,534
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| Priority Number: |
| 1999-05-20 |
US1999000315775 |
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| Abstract: |
A voltage translator uses an n-channel translator transistor to translate an input voltage at its drain to an output voltage at its source. The gate and substrate of the translator transistor are each biased by charge pumps. A reference transistor is also biased by the charge pumps. A reference input voltage is translated to a reference output voltage by the reference transistor. The reference output voltage is compared to a target output voltage by comparators. When the reference output voltage is below the target, the gate charge pump is turned on, raising the gate voltage to both the reference and translator transistors. The higher gate voltage VGATE raises the output voltage VOUT since VOUT=VGATE-VT for a transistor in saturation. When the reference output voltage is above the target, the substrate charge pump is turned on, pulling the substrate bias voltage below ground. The body effect causes the transistor threshold VT to increase as the substrate is pumped. The higher threshold lowers the output voltage. Once the reference output voltage reaches the target, the charge pumps turn off. The input voltage can toggle high and low since the reference transistor sets the gate and substrate voltages.
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| Attorney, Agent or Firm: |
Auvinen, Stuart T. ;
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| Primary / Asst. Examiners: |
Nelms, David; Lam, David
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| INPADOC Legal Status: |
Show legal status actions
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| Family: |
None
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First Claim:
Show all 20 claims |
We claim:
1. A voltage translator circuit comprising:
- a signal input having an input voltage;
- a signal output having an output voltage;
- a translator transistor, for translating the input voltage to the output voltage, the translator transistor having a gate for controlling conduction from the signal input to the signal output;
- a reference input voltage;
- a target input for inputting a target output voltage;
- a reference transistor, for translating the reference input voltage to generate a feedback output voltage, the reference transistor having a gate for controlling conduction from the reference input voltage to the feedback output voltage;
- a comparator, coupled to the reference transistor, for comparing the feedback output voltage to the target output voltage; and
- a gate charge pump, responsive to the comparator, for raising a gate voltage when the comparator determines that the feedback output voltage is below the target output voltage;
- wherein the gate voltage from the gate charge pump is applied to the gate of the reference transistor and to the gate of the translator transistor;
whereby the feedback output voltage is raised by the gate charge pump when the comparator determines that the feedback output voltage is below the target output voltage.
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| Background / Summary: |
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| Drawing Descriptions: |
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| Description: |
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| Forward References: |
Show 6 U.S. patent(s) that reference this one
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