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Title: US6185122: Vertically stacked field programmable nonvolatile memory and method of fabrication
[ Derwent Title ]


Country: US United States of America

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40 pages

 
Inventor: Johnson, Mark G.; Los Altos, CA
Lee, Thomas H.; Cupertino, CA
Subramanian, Vivek; Menlo Park, CA
Farmwald, P. Michael; Portola Valley, CA
Cleeves, James M.; Redwood City, CA

Assignee: Matrix Semiconductor, Inc., Santa Clara, CA
other patents from MATRIX SEMICONDUCTOR, INC. (765549) (approx. 49)
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Published / Filed: 2001-02-06 / 1999-12-22

Application Number: US1999000469658

IPC Code: Advanced: G11C 11/56; G11C 17/16; H01L 27/10; H01L 27/102;
Core: G11C 17/14; more...
IPC-7: G11C 17/00;

ECLA Code: H01L27/102D; G11C11/56R; G11C17/16;

U.S. Class: Current: 365/103; 257/E27.073; 365/051; 365/063; 365/105;
Original: 365/103; 365/051; 365/105; 365/063;

Field of Search: 365/103,176,180,230.06,105,114,51

Priority Number:
1999-12-22  US1999000469658
1998-11-16  US1998000192883

Abstract:     A very high density field programmable memory is disclosed. An array is formed vertically above a substrate using several layers, each layer of which includes vertically fabricated memory cells. The cell in an N level array may be formed with N+1 masking steps plus masking steps needed for contacts. Maximum use of self alignment techniques minimizes photolithographic limitations. In one embodiment the peripheral circuits are formed in a silicon substrate and an N level array is fabricated above the substrate.

Attorney, Agent or Firm: Blakely, Sokoloff, Taylor & Zafman LLP ;

Primary / Asst. Examiners: Nelms, David; Le, Thong

INPADOC Legal Status: Show legal status actions          Buy Now: Family Legal Status Report

       
Related Applications: Go to Result Set: 15 patent(s) that list this one as related
Application Number Filed Patent Pub. Date  Title
US1998000192883 1998-11-16    2000-03-07  Vertically stacked field programmable nonvolatile memory and method of fabrication


       
Parent Case:     This is a divisional of Ser. No. 09/192,883 filed Nov. 16, 1998, now U.S. Pat. No. 6,034,882.

Designated Country: AE AL AM AP AT AZ BA BB BG BR BY CA CH CU CZ DK EA EE ES FI GD GE GH GM HR HU ID IL IN IS KE KG KP  DE FR GB 

Family: Show 36 known family members

First Claim:
Show all 59 claims
We claim:     1. A memory array comprising:
  • a first plurality of spaced-apart, parallel, substantially coplanar conductors;
  • a second plurality of spaced-apart, parallel, substantially coplanar conductors disposed generally vertically above and spaced-apart from the first conductors, said first and second conductors being generally orthogonal to one another; and
  • a plurality of first memory cells each comprising a first steering element in contact with a first state change element, each cell directly disposed between one of the first and one of the second conductors and located where a vertical projection of the first conductors intersects the second conductors, the first steering elements being in contact with the second conductors;
  • a third plurality of spaced-apart, parallel, substantially coplanar conductors disposed generally vertically above and spaced-apart from the second conductors, the third conductors running in the same direction as the first conductors;
  • a plurality of second memory cells each comprising a second steering element in contact with a second state change element, each cell directly disposed between one of the second conductors and one of the third conductors and located where a vertical projection of the second conductors intersects the third conductors, the second steering elements being in contact with the second conductors.


Background / Summary: Show background / summary

Drawing Descriptions: Show drawing descriptions

Description: Show description

Forward References: Show 254 U.S. patent(s) that reference this one

       
U.S. References: Go to Result Set: All U.S. references   |  Forward references (254)   |   Backward references (52)   |   Citation Link

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Patent  Pub.Date  Inventor Assignee   Title
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Buy PDF- 5pp US3582908  1971-06 Koo et al.  Bell Telephone Laboratories, Incorporated WRITING A READ-ONLY MEMORY WHILE PROTECTING NONSELECTED ELEMENTS
Buy PDF- 8pp US3634929  1972-01 Yoshida et al.  Tokyo Shibaura Electric Co., Ltd. METHOD OF MANUFACTURING SEMICONDUCTOR INTEGRATED CIRCUITS
Buy PDF- 7pp US3671948  1972-06 Cassen et al.  North American Rockwell Corporation READ-ONLY MEMORY
Buy PDF- 8pp US3717852  1973-02 Abbas et al.  International Business Machines Corporation ELECTRONICALLY REWRITABLE READ-ONLY MEMORY USING VIA CONNECTIONS
  US3728695  1973-04 Frohman-Bentchkowsky  Intel Corporation RANDOM-ACCESS FLOATING GATE MOS MEMORY ARRAY
Buy PDF- 7pp US3787822  1974-01 Rioult  U.S. Philips Corporation METHOD OF PROVIDING INTERNAL CONNECTIONS IN A SEMICONDUCTOR DEVICE
Buy PDF- 14pp US3863231  1975-01 Taylor  National Research Development Corporation READ ONLY MEMORY WITH ANNULAR FUSE LINKS
Buy PDF- 13pp US3990098  1976-11 Mastrangelo  E. I. Du Pont de Nemours and Co. Structure capable of forming a diode and associated conductive path
Buy PDF- 15pp US4146902  1979-03 Tanimoto et al.  Nippon Telegraph and Telephone Public Corp. Irreversible semiconductor switching element and semiconductor memory device utilizing the same
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Buy PDF- 13pp US4203158  1980-05 Frohman-Bentchkowsky et al.  Intel Corporation Electrically programmable and erasable MOS floating gate memory device employing tunneling and method of fabricating same
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Buy PDF- 12pp US4272880  1981-06 Pashley  Intel Corporation MOS/SOS Process
Buy PDF- 10pp US4281397  1981-07 Neal et al.  Texas Instruments Incorporated Virtual ground MOS EPROM or ROM matrix
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Buy PDF- 17pp US4442507  1984-04 Roesner  Burroughs Corporation Electrically programmable read-only memory stacked above a semiconductor substrate
Buy PDF- 14pp US4489478  1984-12 Sakurai  Fujitsu Limited Process for producing a three-dimensional semiconductor device
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Buy PDF- 8pp US4498226  1985-02 Inoue et al.  Tokyo Shibaura Denki Kabushiki Kaisha Method for manufacturing three-dimensional semiconductor device by sequential beam epitaxy
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Buy PDF- 5pp US5070383  1991-12 Sinar et al.  Zoran Corporation Programmable memory matrix employing voltage-variable resistors
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Buy PDF- 7pp US5306935  1994-04 Esquivel et al.  Texas Instruments Incorporated Method of forming a nonvolatile stacked memory
Buy PDF- 33pp US5311039  1994-05 Kimura et al.  Seiko Epson Corporation PROM and ROM memory cells
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Buy PDF- 11pp US5391518  1995-02 Bhushan  VLSI Technology, Inc. Method of making a field programmable read only memory (ROM) cell using an amorphous silicon fuse with buried contact polysilicon and metal electrodes
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Buy PDF- 10pp US5441907  1995-08 Sung et al.  Taiwan Semiconductor Manufacturing Company Process for manufacturing a plug-diode mask ROM
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Buy PDF- 25pp US5535156  1996-07 Levy et al.  California Institute of Technology Transistorless, multistable current-mode memory cells and memory arrays and methods of reading and writing to the same
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Buy PDF- 9pp US5675547  1997-10 Koga  Sony Corporation One time programmable read only memory programmed by destruction of insulating layer
Buy PDF- 6pp US5737259  1998-04 Chang  United Microelectronics Corporation Method of decoding a diode type read only memory
Buy PDF- 25pp US5745407  1998-04 Levy et al.  California Institute of Technology Transistorless, multistable current-mode memory cells and memory arrays and methods of reading and writing to the same
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Foreign References: None

Other Abstract Info: DERABS C2001-519835

Other References:
  • "The route to 3-D Chips", high Technology, Sep. 1983, vol. 3, No. 9, at p. 55.
  • A New Programmable Cell Utilizing Insulator Breakdown, 1985, pp. 640-IEDM-85 (26.7), pp. IEDM 85-641 (26.7), 642-IEDM (26.7), IEMD Technical Digest "International Electron Devices Meeting 1985".
  • Solid State Circuits, "A Fully Decoded 2048-Bit Elctrically Programmable FAMOS Read-Only Memory", "A Memory System Based On Surface-Charge Transport".


  • Continuity Data:
    Application Number Filed Notes

    US1999000469658 1999-12-22  is a related to the prior publication
         US20030016553A1 issued 2003-01-23  Vertically stacked field programmable nonvolatile memory and method of fabrication

    US1999000469658 1999-12-22  is a related to the prior publication
         US20030206429A2 issued 2003-11-06  VERTICALLY STACKED FIELD PROGRAMMABLE NONVOLATILE MEMORY AND METHOD OF FABRICATION

    US1999000469658 1999-12-22  is a related to the prior publication
         US20050063220A1 issued 2005-03-24  Memory device and method for simultaneously programming and/or reading memory cells on different levels

    US1999000469658 1999-12-22  is a related to the prior publication
         US20050105371A1 issued 2005-05-19  Integrated circuit incorporating three-dimensional memory array with dual opposing decoder arrangement

    US1999000469658 1999-12-22  is a related to the prior publication
         US20060134837A1 issued 2006-06-22  Vertically stacked field programmable nonvolatile memory and method of fabrication

    US1999000469658 1999-12-22  is a related to the prior publication
         US20060141679A1 issued 2006-06-29  Vertically stacked field programmable nonvolatile memory and method of fabrication

    11925723   is a continuation of
    US2006000355214  2006-02-14
         US7319053 issued 2008-01-15   Vertically stacked field programmable nonvolatile memory and method of fabrication

    US2005000987091   is a continuation of
    US2004000774818  2004-02-09   (pending) [presumed granted]
         US7190602 issued 2007-03-13   Integrated circuit incorporating three-dimensional memory array with dual opposing decoder arrangement

    US2004000987091 2004-11-12  is a continuation of
    US2004000774818  2004-02-09   (pending) [presumed granted]
         US7190602 issued 2007-03-13   Integrated circuit incorporating three-dimensional memory array with dual opposing decoder arrangement

    US2004000774818 2004-02-09  is a continuation of
    US2002000253354  2002-09-23   (granted)
         US6780711 issued 2004-08-24   Vertically stacked field programmable nonvolatile memory and method of fabrication

    US2004000774818   is a continuation of
    US2002000253354  2002-09-23
         US6780711 issued 2004-08-24   Vertically stacked field programmable nonvolatile memory and method of fabrication

    US2006000355214 2006-02-14  is a continuation of
    US2001000939498  2001-08-24   (pending) [presumed granted]
         US7157314 issued 2007-01-02   Vertically stacked field programmable nonvolatile memory and method of fabrication

    US2006000354470 2006-02-14  is a continuation of
    US2001000939498  2001-08-24   (pending) [presumed granted]
         US7157314 issued 2007-01-02   Vertically stacked field programmable nonvolatile memory and method of fabrication

    US2002000251206 2002-09-19  is a division of
    US2001000939498  2001-08-24   (pending) [presumed granted]
         US7157314 issued 2007-01-02   Vertically stacked field programmable nonvolatile memory and method of fabrication

    US2002000251206   is a division of
    US2001000939498  2001-08-24   (pending) [presumed granted]
         US7157314 issued 2007-01-02   Vertically stacked field programmable nonvolatile memory and method of fabrication

    11355214   is a continuation of
    US2001000939498  2001-08-24
         US7157314 issued 2007-01-02   Vertically stacked field programmable nonvolatile memory and method of fabrication

    11354470   is a continuation of
    US2001000939498  2001-08-24
         US7157314 issued 2007-01-02   Vertically stacked field programmable nonvolatile memory and method of fabrication

    US2002000253354 2002-09-23  is a continuation of
    US2001000939431  2001-08-24   (granted)
         US6483736 issued 2002-11-19   Vertically stacked field programmable nonvolatile memory and method of fabrication

    US2002000253354   is a continuation of
    US2001000939431  2001-08-24
         US6483736 issued 2002-11-19   Vertically stacked field programmable nonvolatile memory and method of fabrication

    US2001000939498 2001-08-24  is a continuation of
    US2000000714440  2000-11-15   (pending) [presumed granted]
         US6351406 issued 2002-02-26   Vertically stacked field programmable nonvolatile memory and method of fabrication

    US2001000939498 2001-08-24  is a continuation of
    US2000000714440  2000-11-15   (granted)
         US6351406 issued 2002-02-26   Vertically stacked field programmable nonvolatile memory and method of fabrication

    US2001000939498   is a continuation of
    US2000000714440  2000-11-15
         US6351406 issued 2002-02-26   Vertically stacked field programmable nonvolatile memory and method of fabrication

    US2001000939498 2001-08-24  is a continuation of
    US2000000714440  2000-11-15   (granted)
         6,351,406 issued

    US2001000939431 2001-08-24  is a continuation of
    US2000000714440  2000-11-15   (pending) [presumed granted]
         US6351406 issued 2002-02-26   Vertically stacked field programmable nonvolatile memory and method of fabrication

    US2001000939431 2001-08-24  is a continuation of
    US2000000714440  2000-11-15   (granted)
         US6351406 issued 2002-02-26   Vertically stacked field programmable nonvolatile memory and method of fabrication

    US2001000939431   is a continuation of
    US2000000714440  2000-11-15
         US6351406 issued 2002-02-26   Vertically stacked field programmable nonvolatile memory and method of fabrication

    US2000000714440 2000-11-15  is a continuation of
    >US1999000469658<  1999-12-22   (granted)
         US6185122 issued 2001-02-06   Vertically stacked field programmable nonvolatile memory and method of fabrication

    US2000000714440   is a continuation of
    >US1999000469658<  1999-12-22
         US6185122 issued 2001-02-06   Vertically stacked field programmable nonvolatile memory and method of fabrication

    US2000000714440 2000-11-15  is a continuation of
    >US1999000469658<  1999-12-22   (granted)
         6,185,122 issued

    >US1999000469658< 1999-12-22  is a division of
    US1998000192883  1998-11-16   (granted)
         US6034882 issued 2000-03-07   Vertically stacked field programmable nonvolatile memory and method of fabrication

    >US1999000469658<   is a division of
    US1998000192883  1998-11-16
         US6034882 issued 2000-03-07   Vertically stacked field programmable nonvolatile memory and method of fabrication

    >US1999000469658< 1999-12-22  is a division of
    US1998000192883  1998-11-16   (granted)
         6,34,882 issued


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