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Title: US6351406: Vertically stacked field programmable nonvolatile memory and method of fabrication
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Country: US United States of America

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39 pages

 
Inventor: Johnson, Mark G.; Los Altos, CA
Lee, Thomas H.; Cupertino, CA
Subramanian, Vivek; Menlo Park, CA
Farmwald, P. Michael; Portola Valley, CA
Cleeves, James M.; Redwood City, CA

Assignee: Matrix Semiconductor, Inc., Santa Clara, CA
other patents from MATRIX SEMICONDUCTOR, INC. (765549) (approx. 49)
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Published / Filed: 2002-02-26 / 2000-11-15

Application Number: US2000000714440

IPC Code: Advanced: G11C 11/56; G11C 17/14;
Core: more...
IPC-7: G11C 17/00;

ECLA Code: G11C17/14; G11C11/56R;

U.S. Class: Current: 365/103; 365/164;
Original: 365/103; 365/164;

Field of Search: 365/103,174,212,230.06,164

Priority Number:
2000-11-15  US2000000714440
1999-12-22  US1999000469658
1998-11-16  US1998000192882

Abstract:     A very high density field programmable memory is disclosed. An array is formed vertically above a substrate using several layers, each layer of which includes vertically fabricated memory cells. The cell in an N level array may be formed with N+1 masking steps plus masking steps needed for contacts. Maximum use of self alignment techniques minimizes photolithographic limitations. In one embodiment the peripheral circuits are formed in a silicon substrate and an N level array is fabricated above the substrate.

Attorney, Agent or Firm: Blakely, Sokoloff, Taylor & Zafman LLP ;

Primary / Asst. Examiners: Nelms, David; Le, Thong

Maintenance Status: CC Certificate of Correction issued
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Related Applications: Go to Result Set: 10 patent(s) that list this one as related
Application Number Filed Patent Pub. Date  Title
US1999000469658 1999-12-22    2001-02-06  Vertically stacked field programmable nonvolatile memory and method of fabrication
US1998000192882 1998-11-16    2000-03-07  Vertically stacked field programmable nonvolatile memory and method of fabrication


       
Parent Case:     This application is a continuation of Ser. No. 09/469,658, filed on Dec. 22, 1999, now U.S. Pat. No. 6,185,122; which is a division of application Ser. No. 09/192,883 filed on Nov. 16, 1998, now U.S. Pat. No. 6,034,882.

Family: Show 31 known family members

First Claim:
Show all 26 claims
We claim:     1. A memory comprising:
  • a semiconductor substrate having peripheral circuits for the memory;
  • a memory array having a plurality of levels where each level includes a plurality of memory cells formed above the substrate, the memory cells at each level being coupled to a plurality of first and second lines; and
  • a plurality of vias for providing electrical connections between at least the first lines in more than one of the levels and the peripheral circuits of the substrate, each of the vias extending through more than one of the levels and contacting first lines in more than one level such that fewer than one via mask is needed per level.


Background / Summary: Show background / summary

Drawing Descriptions: Show drawing descriptions

Description: Show description

Forward References: Show 103 U.S. patent(s) that reference this one

       
U.S. References: Go to Result Set: All U.S. references   |  Forward references (103)   |   Backward references (57)   |   Citation Link

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PDF
Patent  Pub.Date  Inventor Assignee   Title
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Buy PDF- 8pp US3634929  1972-01 Yoshida et al.  Tokyo Shibaura Electric Co., Ltd. METHOD OF MANUFACTURING SEMICONDUCTOR INTEGRATED CIRCUITS
Buy PDF- 7pp US3671948  1972-06 Cassen et al.  North American Rockwell Corporation READ-ONLY MEMORY
Buy PDF- 8pp US3717852  1973-02 Abbas et al.  International Business Machines Corporation ELECTRONICALLY REWRITABLE READ-ONLY MEMORY USING VIA CONNECTIONS
  US3728695  1973-04 Frohman-Bentchkowsky  Intel Corporation RANDOM-ACCESS FLOATING GATE MOS MEMORY ARRAY
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Buy PDF- 25pp US5535156  1996-07 Levy et al.  California Institute of Technology Transistorless, multistable current-mode memory cells and memory arrays and methods of reading and writing to the same
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Buy PDF- 10pp US5801437  1998-09 Burns  Staktek Corporation Three-dimensional warp-resistant integrated circuit module method and apparatus
Buy PDF- 23pp US5835396  1998-11 Zhang   Three-dimensional read-only memory
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Buy PDF- 38pp US6034882  2000-03 Johnson et al.  Matrix Semiconductor, Inc. Vertically stacked field programmable nonvolatile memory and method of fabrication
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Foreign References: None

Other Abstract Info: DERABS C2002-380876

Other References:
  • Frohman-Bentchkowsky, "A Fully Decoded 2048-Bit Electrically Programmable FAMOS Read-Only Memory"IEEE Journal of Solid-State Circuits, vol. sc-6, No. 5, October 1971, pp. 301-306. Cited by 31 patents
  • Sato, Nawata, and Wada, "A New Programmable Cell Utilizing Insulator Breakdown"; International Electronics Devices Meeting, 1985 IC Development Division, Fujitsu Limited Nakahara-ku, Kawasaki 211, Japan; pp. 639-642.
  • Douglas, John H. "The Route To 3-D Chips"High Technology, Sept. 1983, vol. 3, No. 9, pp. 55-59.


  • Continuity Data:
    Application Number Filed Notes

    US2000000714440 2000-11-15  is a related to the prior publication
         US20030016553A1 issued 2003-01-23  Vertically stacked field programmable nonvolatile memory and method of fabrication

    US2000000714440 2000-11-15  is a related to the prior publication
         US20030206429A2 issued 2003-11-06  VERTICALLY STACKED FIELD PROGRAMMABLE NONVOLATILE MEMORY AND METHOD OF FABRICATION

    US2000000714440 2000-11-15  is a related to the prior publication
         US20050063220A1 issued 2005-03-24  Memory device and method for simultaneously programming and/or reading memory cells on different levels

    US2000000714440 2000-11-15  is a related to the prior publication
         US20050105371A1 issued 2005-05-19  Integrated circuit incorporating three-dimensional memory array with dual opposing decoder arrangement

    US2000000714440 2000-11-15  is a related to the prior publication
         US20060134837A1 issued 2006-06-22  Vertically stacked field programmable nonvolatile memory and method of fabrication

    US2000000714440 2000-11-15  is a related to the prior publication
         US20060141679A1 issued 2006-06-29  Vertically stacked field programmable nonvolatile memory and method of fabrication

    11925723   is a continuation of
    US2006000355214  2006-02-14
         US7319053 issued 2008-01-15   Vertically stacked field programmable nonvolatile memory and method of fabrication

    US2005000987091   is a continuation of
    US2004000774818  2004-02-09   (pending) [presumed granted]
         US7190602 issued 2007-03-13   Integrated circuit incorporating three-dimensional memory array with dual opposing decoder arrangement

    US2004000987091 2004-11-12  is a continuation of
    US2004000774818  2004-02-09   (pending) [presumed granted]
         US7190602 issued 2007-03-13   Integrated circuit incorporating three-dimensional memory array with dual opposing decoder arrangement

    US2004000774818 2004-02-09  is a continuation of
    US2002000253354  2002-09-23   (granted)
         US6780711 issued 2004-08-24   Vertically stacked field programmable nonvolatile memory and method of fabrication

    US2004000774818   is a continuation of
    US2002000253354  2002-09-23
         US6780711 issued 2004-08-24   Vertically stacked field programmable nonvolatile memory and method of fabrication

    US2006000355214 2006-02-14  is a continuation of
    US2001000939498  2001-08-24   (pending) [presumed granted]
         US7157314 issued 2007-01-02   Vertically stacked field programmable nonvolatile memory and method of fabrication

    US2006000354470 2006-02-14  is a continuation of
    US2001000939498  2001-08-24   (pending) [presumed granted]
         US7157314 issued 2007-01-02   Vertically stacked field programmable nonvolatile memory and method of fabrication

    US2002000251206 2002-09-19  is a division of
    US2001000939498  2001-08-24   (pending) [presumed granted]
         US7157314 issued 2007-01-02   Vertically stacked field programmable nonvolatile memory and method of fabrication

    US2002000251206   is a division of
    US2001000939498  2001-08-24   (pending) [presumed granted]
         US7157314 issued 2007-01-02   Vertically stacked field programmable nonvolatile memory and method of fabrication

    11355214   is a continuation of
    US2001000939498  2001-08-24
         US7157314 issued 2007-01-02   Vertically stacked field programmable nonvolatile memory and method of fabrication

    11354470   is a continuation of
    US2001000939498  2001-08-24
         US7157314 issued 2007-01-02   Vertically stacked field programmable nonvolatile memory and method of fabrication

    US2002000253354 2002-09-23  is a continuation of
    US2001000939431  2001-08-24   (granted)
         US6483736 issued 2002-11-19   Vertically stacked field programmable nonvolatile memory and method of fabrication

    US2002000253354   is a continuation of
    US2001000939431  2001-08-24
         US6483736 issued 2002-11-19   Vertically stacked field programmable nonvolatile memory and method of fabrication

    US2001000939498 2001-08-24  is a continuation of
    >US2000000714440<  2000-11-15   (pending) [presumed granted]
         US6351406 issued 2002-02-26   Vertically stacked field programmable nonvolatile memory and method of fabrication

    US2001000939498 2001-08-24  is a continuation of
    >US2000000714440<  2000-11-15   (granted)
         US6351406 issued 2002-02-26   Vertically stacked field programmable nonvolatile memory and method of fabrication

    US2001000939498   is a continuation of
    >US2000000714440<  2000-11-15
         US6351406 issued 2002-02-26   Vertically stacked field programmable nonvolatile memory and method of fabrication

    US2001000939498 2001-08-24  is a continuation of
    >US2000000714440<  2000-11-15   (granted)
         6,351,406 issued

    US2001000939431 2001-08-24  is a continuation of
    >US2000000714440<  2000-11-15   (pending) [presumed granted]
         US6351406 issued 2002-02-26   Vertically stacked field programmable nonvolatile memory and method of fabrication

    US2001000939431 2001-08-24  is a continuation of
    >US2000000714440<  2000-11-15   (granted)
         US6351406 issued 2002-02-26   Vertically stacked field programmable nonvolatile memory and method of fabrication

    US2001000939431   is a continuation of
    >US2000000714440<  2000-11-15
         US6351406 issued 2002-02-26   Vertically stacked field programmable nonvolatile memory and method of fabrication

    >US2000000714440< 2000-11-15  is a continuation of
    US1999000469658  1999-12-22   (granted)
         US6185122 issued 2001-02-06   Vertically stacked field programmable nonvolatile memory and method of fabrication

    >US2000000714440<   is a continuation of
    US1999000469658  1999-12-22
         US6185122 issued 2001-02-06   Vertically stacked field programmable nonvolatile memory and method of fabrication

    >US2000000714440< 2000-11-15  is a continuation of
    US1999000469658  1999-12-22   (granted)
         6,185,122 issued

    US1999000469658 1999-12-22  is a division of
    US1998000192883  1998-11-16   (granted)
         US6034882 issued 2000-03-07   Vertically stacked field programmable nonvolatile memory and method of fabrication

    US1999000469658   is a division of
    US1998000192883  1998-11-16
         US6034882 issued 2000-03-07   Vertically stacked field programmable nonvolatile memory and method of fabrication

    US1999000469658 1999-12-22  is a division of
    US1998000192883  1998-11-16   (granted)
         6,34,882 issued


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