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Title: |
US6366124:
BiDirectional active voltage translator with bootstrap switches for mixed-supply VLSI
[ Derwent Title ]

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Country: |
US United States of America

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Inventor: |
Kwong, David; Fremont, CA

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Assignee: |
Pericom Semiconductor Corp., San Jose, CA
other patents from PERICOM SEMICONDUCTOR CORP. (713978) (approx. 58)
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Published / Filed: |
2002-04-02
/ 2001-05-16

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Application Number: |
US2001000681651

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IPC Code: |
Advanced:
H03K 17/06;
H03K 17/10;
H03K 19/0185;
H03K 3/356;
H03K 17/693;
Core:
H03K 3/00;
more...
IPC-7:
H03K 19/0175;
H03K 19/094;

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ECLA Code: |
H03K17/06B; H03K17/10B; H03K19/0185B8;

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U.S. Class: |
326/081;
326/088;
327/536;

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Field of Search: |
326/088,82,83,80,81,68
327/536
365/189.11
363/060

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Priority Number: |
| 2001-05-16 |
US2001000681651 |

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Abstract: |
A voltage translator programmably converts signals generated from a first power-supply voltage to a second power-supply voltage, or vice-versa. In response to control signals, bootstrap switches connect either the first or second power supply to a first internal supply, and either the second or first power supply to a second internal supply. A pair of inverters are sourced by the first power supply and generate true and complement data signals. Cross-coupled p-channel load transistors are sourced by the second internal power supply. A differential pair of n-channel transistors have drains connected to the drains of the load transistors, and gates driven by the true and complement data signals. The bootstrap switches use boosted signals above the power-supply voltages to programmably connect full-voltage power supplies to the internal supplies.

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Attorney, Agent or Firm: |
Auvinen, Stuart T. ;

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Primary / Asst. Examiners: |
Tokar, Michael; Chang, Daniel D.

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INPADOC Legal Status: |
Show legal status actions

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Family: |
None

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First Claim:
Show all 12 claims |
What is claimed is:
1. A voltage translator comprising:
- a first power-supply input;
- a second power-supply input, the second power-supply input connected to a different power-supply voltage than the first power-supply input;
- a control input; supply switches, responsive to the control input, for connecting the first power-supply input to an input-stage internal supply and for connecting the second power-supply input to an output-stage internal supply in response to a first state of the control input, but for connecting the second power-supply input to the input-stage internal supply and for connecting the first power-supply input to the output-stage internal supply in response to a second state of the control input;
- an input stage having an inverter for generating a complement data signal from a true data signal, the inverter being powered by the input-stage internal supply;
- a cross-coupled buffer comprising:
- a pair of cross-coupled load transistors coupled to the output-stage internal supply;
- a pair of differential transistors, coupled to receive current from the pair of cross-coupled load transistors, the pair of differential transistors having gates coupled to the true and complement data signals from the input stage; and
- an output signal, driven by a node between one of the pair of cross-coupled load, transistors and one of the pair of differential transistors;
- wherein the supply switches comprise a plurality of switches, each switch comprising:
- an n-channel switch transistor for conducting current from a supply input to an internal supply in response to a control gate;
- a capacitor, coupled to the control gate, for driving a voltage on the control gate to a boosted voltage above a voltage of the supply input;
- a precharge transistor for connecting the supply input to the control gate in response to a precharge pulse;
- a pulse generator for generating the precharge pulse;
- wherein the output signal switches from a ground to a full voltage of the second power-supply input when the control input is in the first state and the true or the complement data signal switches between ground and a fill voltage of the first power-supply input,
- whereby full voltage levels are output and whereby power supplies are selectably connected to the input stage and the cross-coupled buffer by the supply switches in response to the control input.

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Background / Summary: |
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Drawing Descriptions: |
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Description: |
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Forward References: |
Show 5 U.S. patent(s) that reference this one

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