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 Title: |
US6381691:
Method and apparatus for reordering memory operations along multiple execution paths in a processor
[ Derwent Title ]
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| Country: |
US United States of America
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| Inventor: |
Altman, Erik; Danbury, CT
Gschwind, Michael K.; Danbury, CT
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| Assignee: |
International Business Machines Corporation, Armonk, NY
other patents from INTERNATIONAL BUSINESS MACHINES CORPORATION (280070) (approx. 44,393)
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| Published / Filed: |
2002-04-30
/ 1999-08-13
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| Application Number: |
US1999000374255
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| IPC Code: |
Advanced:
G06F 9/38;
Core:
more...
IPC-7:
G06F 9/312;
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| ECLA Code: |
G06F9/38D4; G06F9/38E2; G06F9/38E4; G06F9/38F2; G06F9/38H2;
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| U.S. Class: |
Current:
712/236;
712/216;
712/E09.048;
712/E09.05;
712/E09.053;
712/E09.056;
712/E09.061;
Original:
712/236;
912/216;
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| Field of Search: |
712/236,216,23
717/006
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| Priority Number: |
| 1999-08-13 |
US1999000374255 |
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| Abstract: |
A method is provided for scheduling instructions for execution along multiple paths in a Computer processing system implementing out-of-order execution. The method includes the step of selecting and moving a next instruction from its current position in a sequence of instructions to an earlier position. It is determined whether the selected instruction may reference a memory location for read-access. It is determined whether the selected instruction was previously moved over a non-selected instruction which may ambiguously reference the memory location, when the selected instruction may reference the memory location for read-access. It is determined whether the selected instruction was previously moved over a branch instruction, when the selected instruction was previously moved over the non-selected instruction. A record of the selected instruction is stored for future reference, when the selected instruction was previously moved over the branch instruction. The record includes a path specifier for indicating a path from a current locus of execution to a basic block corresponding to a in-order position of the selected instruction.
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| Attorney, Agent or Firm: |
F. Chau & Associates, LLP ;
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| Primary / Asst. Examiners: |
Coleman, Eric;
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| Maintenance Status: |
E1 Expired Check current status
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| INPADOC Legal Status: |
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| Family: |
None
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First Claim:
Show all 28 claims |
What is claimed is:
1. A method for scheduling instructions for execution along multiple paths in a computer processing system implementing out-of-order execution, the method comprising the steps of:
- selecting and moving a next instruction from its current position in a sequence of instructions to an earlier position;
- determining whether the selected instruction may reference a memory location for read-access;
- determining whether the selected instruction was previously moved over a non-selected instruction which may ambiguously reference the memory location, when the selected instruction may reference the memory location for read-access;
- determining whether the selected instruction was previously moved over a branch instruction, when the selected instruction was previously moved over the non-selected instruction; and
- storing a record of the selected instruction for future reference, when the selected instruction was previously moved over the branch instruction, the record comprising a path specifier for indicating a path from a current locus of execution to a basic block corresponding to an in-order position of the selected instruction.
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| Background / Summary: |
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| Drawing Descriptions: |
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| Description: |
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| Forward References: |
Show 2 U.S. patent(s) that reference this one
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