Integrated circuit structure including three-dimensional memory array (US6385074)

Application Number	Filed	Patent	Pub. Date	Title
US1999000469658	1999-12-22		2001-02-06	Vertically stacked field programmable nonvolatile memory and method of fabrication
US1998000192883	1998-11-16		2000-03-07	Vertically stacked field programmable nonvolatile memory and method of fabrication


	Parent Case:			CROSS-REFERENCE TO RELATED APPLICATION(S) This application is a continuation-in-part of commonly-assigned application Ser. No. 09/469,658, filed Dec. 22, 1999, now U.S. Pat. No. 6,185,122, entitled "Vertically Stacked Field Programmable Non-Volatile Memory and Method of Fabrication" and naming Mark G. Johnson, Thomas IT. Lee, Vivek Subramanian, Paul Michael Farmwald, and James M. Cleeves as inventors, which is incorporated herein by reference in its entirety, and which is a divisional of application Ser. No 09/192,883, filed Nov. 16, 1998, now U.S. Pat. No. 6,034,882, entitled "Vertically Stackcd Field Programmable Non-Volatile Memory and Method of Fabrication" and naming Mark G. Johnson, Thomas H. Lee, Vivek Subramanian, Paul Michael Farmwald, and James M. Cleeves as inventors, which is incorporated herein by reference in its entirety.
	Designated Country:			AE AL AM AP AT AZ BA BB BG BR BY CA CH CU CZ DK EA EE ES FI GD GE GH GM HR HU ID IL IN IS KE KG KP DE FR GB
	Family:			Show 36 known family members
	First Claim: Show all 51 claims			What is claimed is: 1. An integrated circuit device comprising: a three-dimensional array of memory cells; and array terminal circuitry coupled to the memory array for providing to at least one selected memory cell of the array a read voltage to read the at least one selected memory cell and a write voltage to write the at least one selected memory cell; and a voltage generator circuit to generate the write voltage.
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	Forward References:			Show 33 U.S. patent(s) that reference this one

U.S. References:

Go to Result Set: All U.S. references | Forward references (33) | Backward references (64) | Citation Link

Patent	Pub.Date	Inventor	Assignee	Title
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	Foreign References:			None
	Other Abstract Info:			DERABS C2002-506579
	Other References:			U.S. Pat. application No. 09/748,815, files Dec. 22, 2000, entitled "Charge Pump Circuit," naming inventors Mark G. Johnson, Joseph G. Nolan III, and Matthew P. Crowle, p. 39. U.S. Pat. application No. 09/560,626, filed Apr. 28, 2000, entitled "Three-Dimensional Memory Array and Method of Fabrication," naming inventor N. Johan Knall, p. 48.
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