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Title: |
US6442713:
Cluster node distress signal
[ Derwent Title ]

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Country: |
US United States of America

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Inventor: |
Block, Timothy Roy; Rochester, MN
Rabe, Rodney Lee; Byron, MN

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Assignee: |
International Business Machines Corporation, Armonk, NY
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Published / Filed: |
2002-08-27
/ 1999-03-30

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Application Number: |
US1999000281026

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IPC Code: |
Advanced:
G06F 11/00;
G06F 11/07;
G06F 11/30;
G06F 15/16;
G06F 15/177;
Core:
more...
IPC-7:
G06F 11/00;

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ECLA Code: |
H04L29/14; S06F11/20D1;

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U.S. Class: |
714/043;
709/220;

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Field of Search: |
714/043,44,45,47,48,6,7,13,39,41,46,25,30
709/203,220,221

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Priority Number: |
| 1999-03-30 |
US1999000281026 |

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Abstract: |
The preferred embodiment of the present invention provides a cluster node distress system and method that improves the reliability of a cluster. The cluster node distress system provides a cluster node distress signal when a node on the cluster is about to fail. This allows the cluster to better to determine whether a non-communicating node has failed or has merely been partitioned from the cluster. The preferred cluster node distress system is embedded deeply into the operating system and provides a pre-built node distress signal that can be quickly sent to other nodes in the cluster when an imminent failure of that node is detected, improving the probability that the node distress signal will get out before the node totally fails. When the node distress signal is effectively sent to other nodes in the cluster, the cluster can accurately determine that the node has failed and has not just partitioned from the cluster. This allows the cluster to respond correctly, i.e., by assigning other nodes primary responsibility, with less intervention needed by administrators.

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Attorney, Agent or Firm: |
Schmeiser, Olsen & Watts ;
Roth, Steven W. ;

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Primary / Asst. Examiners: |
Iqbal, Nadeem;

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INPADOC Legal Status: |
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Family: |
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First Claim:
Show all 38 claims |
What is claimed is:
1. A node in a cluster of nodes, the node comprising:
- at least one processor;
- a memory coupled to at least one processor;
- a cluster node distress signaler residing in said memory, the cluster node distress signaler including a prebuilt distress message indicating failure of the node on a cluster, the cluster node distress signaler sending the prebuilt distress message to the other nodes in the cluster when a failure event is detected.

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Background / Summary: |
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Drawing Descriptions: |
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Description: |
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Forward References: |
Show 18 U.S. patent(s) that reference this one

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