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 Title: |
US6779049:
Symmetric multi-processing system with attached processing units being able to access a shared memory without being structurally configured with an address translation mechanism
[ Derwent Title ]
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| Country: |
US United States of America
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| Inventor: |
Altman, Erik R.; Danbury, CT
Capek, Peter G.; Ossining, NY
Gschwind, Michael; Chappaqua, NY
Hofstee, Harm Peter; Austin, TX
Kahle, James Allan; Austin, TX
Nair, Ravi; Briarcliff Manor, NY
Sathaye, Sumedh Wasudeo; Lagrangeville, NY
Wellman, John-David; Hopewell Junction, NY
Suzuoki, Masakazu; Austin, TX
Yamazaki, Takeshi; Austin, TX
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| Assignee: |
International Business Machines Corporation, Armonk, NY
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| Published / Filed: |
2004-08-17
/ 2000-12-14
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| Application Number: |
US2000000736585
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| IPC Code: |
Advanced:
G06F 12/10;
Core:
more...
IPC-7:
G06F 13/28;
G06F 13/368;
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| ECLA Code: |
G06F12/10L;
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| U.S. Class: |
710/022;
710/026;
711/147;
711/153;
711/173;
711/202;
711/203;
711/205;
711/206;
711/207;
711/208;
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| Field of Search: |
710/022,26,27,62,74
711/001,5,6,147,150,153,173,202,203,205,206,207,208,209
712/001,14,20,27
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| Priority Number: |
| 2000-12-14 |
US2000000736585 |
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| Abstract: |
A method and system for attached processing units accessing a shared memory in an SMP system. In one embodiment, a system comprises a shared memory. The system further comprises a plurality of processing elements coupled to the shared memory. Each of the plurality of processing elements comprises a processing unit, a direct memory access controller and a plurality of attached processing units. Each direct memory access controller comprises an address translation mechanism thereby enabling each associated attached processing unit to access the shared memory in a restricted manner without an address translation mechanism. Each attached processing unit is configured to issue a request to an associated direct memory access controller to access the shared memory specifying a range of addresses to be accessed as virtual addresses. The associated direct memory access controller is configured to translate the range of virtual addresses into an associated range of physical addresses.
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| Attorney, Agent or Firm: |
Voigt, Jr., Robert A.Winstead Sechrest & Minick P.C. ;
Salys, Casimer K. ;
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| Primary / Asst. Examiners: |
Peikari, B. James;
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| Maintenance Status: |
CC Certificate of Correction issued
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| INPADOC Legal Status: |
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| Parent Case: |
CROSS REFERENCE TO RELATED APPLICATIONS
The present invention is related to the following U.S. Patent Applications which are incorporated herein by reference:
- Ser. No. 09/736,356 entitled "Token Based DMA" filed Dec. 14, 2000.
- Ser. No. 09/736,582 entitled "Reduction of Interrupts in Remote Procedure Calls" filed Dec. 14, 2000.
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| Family: |
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First Claim:
Show all 14 claims |
What is claimed is:
1. A system comprising:
- a shared memory; and
- a plurality of processing elements coupled to said shared memory, wherein at least one of said plurality of processing elements comprises a processing unit, a direct memory access controller and a plurality of attached processing units, wherein said direct memory access controller comprises an address translation mechanism, wherein said plurality of attached processing units are configured to access said shared memory using said direct memory access controller.
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| Background / Summary: |
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| Drawing Descriptions: |
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| Description: |
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| Forward References: |
Show 13 U.S. patent(s) that reference this one
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