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Title: US7034588: Calibration of up and down charge-pump currents using a sample-and-hold circuit during idle times
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Country: US United States of America

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Inventor: Cheung, Vincent Sin-Luen; Hong Kong, China
Wong, Gary Wing-Kei; Hong Kong, China

Assignee: Pericom Technology Inc., San Jose, CA, United States of America
other patents from Pericom Technology Inc. (871774) (approx. 1)
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Published / Filed: 2006-04-25 / 2004-08-27

Application Number: US2004000711151

IPC Code: Advanced: H03L 7/06;
Core: more...

ECLA Code: H03L7/089C4D;

U.S. Class: 327/157;

Field of Search: 327/147-148,156-157 375/374

Priority Number:
2004-08-27  US2004000711151

Abstract:     A charge pump for a phase-locked loop (PLL) has accurate matching of charge and discharge currents applied to the PLL's loop filter. A variable current-sink transistor has its gate-to-source voltage adjusted to match a source current from a fixed current source. An intermediate node in-between series transistors between the current source and sink is sampled by a sampling transistor that connects the intermediate node to a sampling capacitor. The sampling capacitor's voltage is the gate-to-source voltage of the variable current-sink transistor. The variable current-sink transistor has its gate and drain coupled together through the sampling transistor during calibration periods when the charge pump is otherwise idle. When the source current exactly matches the sink current, the gate-to-source voltage stored on the sampling capacitor reaches steady state. Up and down currents are balanced in driver transistors that match the series transistors.

Attorney, Agent or Firm: Auvinen, Stuart T. ;

Primary / Asst. Examiners: Ton, My-Trang Nu;

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First Claim:
Show all 20 claims
    1. A charge pump comprising:

an up input and a down input to the charge pump;

an output having an output capacitance to be charged in response to the up input and discharged in response to the down input;

a fixed current source that sources a relatively constant source current to a first junction node;

a variable current source that sources a varying source current to a second junction node, wherein the varying source current varies in response to a control voltage;

a first driver transistor, coupled to conduct current between the first junction node and the output in response to the up input;

a second driver transistor, coupled to conduct current between the second junction node and the output in response to the down input;

a first series transistor, coupled to conduct current between the first junction node and an intermediate node in response to the up input being inactive;

a second series transistor, coupled to conduct current between the second junction node and the intermediate node in response to the down input being inactive;

a sampling capacitor for storing a sampled charge, generating the control voltage to the variable current source; and

a sampling switch coupled to conduct current between the intermediate node and the sampling capacitor when the up input and the down input are inactive, whereby the intermediate node is coupled to the sampling capacitor to adjust the varying source current.



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Forward References: Show 6 U.S. patent(s) that reference this one

       
U.S. References: Go to Result Set: All U.S. references   |  Forward references (6)   |   Backward references (9)   |   Citation Link

Buy
PDF
Patent  Pub.Date  Inventor Assignee   Title
Buy PDF- 10pp US5508660  1996-04 Gersbach et al.  International Business Machines Corporation Charge pump circuit with symmetrical current output for phase-controlled loop system
Buy PDF- 9pp US5646563  1997-07 Kuo  National Semiconductor Corporation Charge pump with near zero offset current
Buy PDF- 5pp US6265946  2001-07 Bartlett  LSI Logic Corporation Differential mode charge pump and loop filter with common mode feedback
Buy PDF- 9pp US6292061  2001-09 Qu  Sandcraft, Inc. Low-voltage CMOS phase-locked loop (PLL) for high-performance microprocessor clock generation
Buy PDF- 22pp US6597217  2003-07 Ingino, Jr.  Broadcom Corporation Low power, charge injection compensated charge pump
Buy PDF- 8pp US6608511  2003-08 Hsu  Via Technologies, Inc. Charge-pump phase-locked loop circuit with charge calibration
Buy PDF- 12pp US6611160  2003-08 Lee et al.  Skyworks Solutions, Inc. Charge pump having reduced switching noise
Buy PDF- 16pp US6636105  2003-10 Soda  NEC Electronics Corporation Semiconductor device, a charge pump circuit and a PLL circuit that can suppress a switching noise
Buy PDF- 13pp US6664828  2003-12 Gauthier et al.  Sun Microsystems, Inc. Post-silicon control of phase locked loop charge pump current
       
Foreign References: None

Continuity Data:
Application Number Filed Notes

US2004000711151 2004-08-27  is a related to the prior publication
     US20060044031A1 issued 2006-03-02  CALIBRATION OF UP AND DOWN CHARGE-PUMP CURRENTS USING A SAMPLE-AND-HOLD CIRCUIT DURING IDLE TIMES


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