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Title: |
US7093147:
Dynamically selecting processor cores for overall power efficiency
[ Derwent Title ]

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Country: |
US United States of America

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Inventor: |
Farkas, Keith; San Carlos, CA, United States of America
Jouppi, Norman P.; Palo Alto, CA, United States of America
Mayo, Robert N.; Mountain View, CA, United States of America
Ranganathan, Parthasarathy; Palo Alto, CA, United States of America

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Assignee: |
Hewlett-Packard Development Company, L.P., Houston, TX, United States of America
other patents from HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (815532) (approx. 1,981)
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Published / Filed: |
2006-08-15
/ 2003-04-25

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Application Number: |
US2003000423397

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IPC Code: |
Advanced:
G06F 1/32;
Core:
more...

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ECLA Code: |
G06F9/50L2; G06F1/32P;

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U.S. Class: |
713/320;

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Field of Search: |
713/320

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Priority Number: |
| 2003-04-25 |
US2003000423397 |

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Abstract: |
A computer system for conserving operating power includes a number of computer hardware processor cores that differ amongst themselves in at least in their respective operating power requirements and processing capabilities. A monitor gathers performance metric information from each of the computer hardware processor cores that is specific to a particular run of application software then executing. A workload transfer mechanism transfers the executing application software to a second computer hardware processor core in a search for reduced operating power. A transfer delay mechanism is connected to delay a subsequent transfer of the executing application software if the system operating power may be conserved by such delay.

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Primary / Asst. Examiners: |
Cao, Chun; Wang, Albert

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INPADOC Legal Status: |
None
Family Legal Status Report

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Family: |
Show 2 known family members

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First Claim:
Show all 16 claims |
1. A multi-core processor computer system for conserving average operating power, comprising: a plurality of computer hardware processor cores that differ amongst themselves in at least their respective operating power requirements and processing capabilities; a monitor for gathering performance and power metric information from a first one of said computer hardware processor cores that is running software; and a workload transfer and control mechanism connected to the plurality of computer hardware processor cores and to the monitor to select a second one of said processing cores to run the software, wherein the monitor gathers performance and power metric information from the second one of the processing cores, and wherein the workload transfer and control mechanism compares the performance and power metric information from the second processing core with the performance and power metric information from the first processing core, and selects one of the first and second processing cores to continue running the software based on the comparison.

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Background / Summary: |
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Drawing Descriptions: |
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Description: |
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Forward References: |
Show 9 U.S. patent(s) that reference this one

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