a first interface to a first PCI bus;

a second interface to a second PCI bus;

a cache buffer for storing data read from a PCI-bus memory for a current command;

prefetch control means for fetching data from the PCI-bus memory into the cache buffer for the current command, the prefetch control means fetching a maximum amount of data determined by a prefetch count;

wherein the current command is a read command or a read-multiple command, the read-multiple command able to read a larger amount of data than the read command;

first statistical means, responsive when the current command is the read command to read from the PCI-bus memory on the first PCI bus, for generating the prefetch count for the read command by storing statistics indicating under-fetching and over-fetching of prior read commands; and

second statistical means, responsive when the current command is the read-multiple command to read from the PCI-bus memory on the first PCI bus, for generating the prefetch count for the read-multiple command by storing statistics indicating under-fetching and over-fetching of prior read-multiple commands;

wherein the first statistical means further comprises:

first prefetch count means for generating the prefetch count when the current command is the read command;

first under-prefetching count means for tracking read commands wherein the prefetch control means under-prefetched data into the cache buffer;

first over-prefetching count means for tracking read commands wherein the prefetch control means over-prefetched data into the cache buffer;

first adjust means, coupled to the first prefetch count means, for increasing the prefetch count generated by the first prefetch count means in response to the first under-prefetching count means indicating that insufficient data was prefetched into the cache buffer in the prior read commands, and for decreasing the prefetch count generated by the first prefetch count means in response to the first over-prefetching count means indicating that un-read data was prefetched into the cache buffer in the prior read commands;

wherein the second statistical means further comprises:

second prefetch count means for generating the prefetch count when the current command is the read-multiple command;

second under-prefetching count means for tracking read-multiple commands wherein the prefetch control means under-prefetched data into the cache buffer;

second over-prefetching count means for tracking read-multiple commands wherein the prefetch control means over-prefetched data into the cache buffer; and

second adjust means, coupled to the second prefetch count means, for increasing the prefetch count generated by the second prefetch count means in response to the second under-prefetching count means indicating that insufficient data was prefetched into the cache buffer in the prior read-multiple commands, and for decreasing the prefetch count generated by the second prefetch count means in response to the second over-prefetching count means indicating that un-read data was prefetched into the cache buffer in the prior read-multiple commands;

wherein the first under-prefetching means comprises a first disconnect means for advancing an indication of under-prefetching when the read command is terminated by the PCI-bus memory disconnecting from the first PCI bus before sufficient data is transferred to the cache buffer;

wherein the first over-prefetching means comprises a first discard means for advancing an indication of over-prefetching when the read command terminates before all data prefetched from the PCI-bus memory for the read command is read by a requestor that generated the read command;

wherein the second under-prefetching means comprises a second disconnect means for advancing an indication of under-prefetching when the read-multiple command is terminated by the PCI-bus memory disconnecting from the second PCI bus before sufficient data is transferred to the cache buffer;

wherein the second over-prefetching means comprises a second discard means for advancing an indication of over-prefetching when the read-multiple command terminates before all data prefetched from the PCI-bus memory for the read-multiple command is read by a requester that generated the read-multiple command,

whereby separate prefetching statistics for the read command and for the read-multiple command generate the prefetch count.