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 Title: |
US7136980:
Computer system implementing synchronized broadcast using skew control and queuing
[ Derwent Title ]
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| Country: |
US United States of America
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| Inventor: |
Cypher, Robert E.; Saratoga, CA, United States of America
Hill, Mark D.; Madison, WI, United States of America
Wood, David A.; Madison, WI, United States of America
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| Assignee: |
Sun Microsystems, Inc., Santa Clara, CA, United States of America
other patents from SUN MICROSYSTEMS, INC. (551495) (approx. 3,879)
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| Published / Filed: |
2006-11-14
/ 2003-06-30
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| Application Number: |
US2003000610447
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| IPC Code: |
Advanced:
G06F 12/00;
G06F 12/06;
G06F 12/08;
G06F 13/00;
G06F 15/167;
Core:
more...
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| ECLA Code: |
G06F12/08B4N; G06F12/08B4P4B;
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| U.S. Class: |
711/167;
710/004;
710/036;
710/052;
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| Field of Search: |
711/141,146,154,145,144,147,167,202,207
710/004,36,52
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| Priority Number: |
| 2003-06-30 |
US2003000610447 |
| 2002-06-28 |
US2002000392569P |
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| Abstract: |
A mechanism and method for maintaining cache consistency in computer systems that implements synchronized broadcasts using skew control and queuing. An access right corresponding to a given block allocated in a first active device may be configured to transition in response to a corresponding data packet being received through a data network. Additionally, transitions in ownership of the given block may occur at a different time than the time at which the access right to the given block is changed. To implement synchronized broadcasts, the address and data networks are configured such that a maximum amount of time from when a given broadcast packet conveyed on the address network arrives at a first active device to a time when the given broadcast packet arrives at a second active device is less than or equal to a minimum amount of time from when a data packet sent on the data network from the first active device arrives at the second active device. Each of the active devices may further comprise a queue control circuit coupled to an address-in queue and a data-in queue. The queue control circuit may be configured to prevent processing of a particular data packet that arrived in the data-in queue until all address packets that arrived earlier in the address-in queue are processed.
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| Attorney, Agent or Firm: |
Meyertons Hood Kivlin Kowert & Goetzel, P.C. ;
Kivlin, B. Noël ;
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| Primary / Asst. Examiners: |
Bataille, Pierre-Michel;
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| INPADOC Legal Status: |
Show legal status actions
Family Legal Status Report
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| Family: |
Show 2 known family members
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First Claim:
Show all 25 claims |
1. A computer system comprising: an address network; a data network; a first device coupled to the address network and the data network; a second device coupled to the address network and the data network; wherein said first device is configured to convey address packets on said address network and data packets on said data network, wherein said first device is configured to transition an access right to a cache block in response to conveying a corresponding data packet on said data network; wherein said address and data networks are configured such that a maximum skew from when any broadcast packet conveyed on said address network arrives at said first device to when the same broadcast packet arrives at the second device is less than or equal to a minimum latency from when a data packet sent on the data network from said first device arrives at said second device.
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| Background / Summary: |
Show background / summary
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| Drawing Descriptions: |
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| Description: |
Show description
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| Forward References: |
Show 1 U.S. patent(s) that reference this one
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| Foreign References: |
None
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| Other References: |
“Specifying and Verifying a Broadcast and a Multicast Snooping Cache Coherence Protocol”, Sorin, et al, IEEE Transactions on Parallel and Distributed Systems, vol. 13, No. 6, Jun. 2002, http://www.cs.wisc.edu/multifacet/papers/tpds02—lamport.pdf.
“Multicast Snooping: A New Coherence Method Using a Multicast Address Network”, Bilir, et al, IEEE International Symposium on Computer Architecture, May 2-4, 1999, http://csdl.computer.org/comp/proceedings/isca/1999/0170/00/01700294a.
“Specifying and Verifying a Broadcast and a Multicast Snooping Cache Coherence Protocol”, Sorin, et al, IEEE Transactions on Parallel and Distributed Systems, vol. 13, No. 6, Jun. 2002, http://www.cs.wisc.edu/multifacet/papers/tpds02—lamport.pdf.
“Multicast Snooping: A New Coherence Method Using a Multicast Address Network”, Bilir, et al, The 26th International Symposium on Computer Architecture, IEEE, Atlanta, GA, May 2-4, 1999, http://csdl.computer.org/comp/proceedings/isca/1999/0170/00/01700294abs.htm.
“Architecture and Design of AlphaServer GS320”, Gharachorloo, et al; ACM Sigplan Notices, vol. 35, Issue 11, Nov. 2000, http://portal.acm.org/citation.cfm?id=356991&dl=ACM&coll=portal.
“View Caching: Efficient Software Shared Memory for Dynamic Computations”, Karamcheti, et al, 11th International Parallel Processing Symposium, Geneva, Switzerland, Apr. 1-5, 1997, http://ipdps.eece.unm.edu/1997/s13/318.pdf.
“Cache-Coherent Distributed Shared Memory: Perspectives on Its Development and Future Challenges”, Hennessy, et al, Proceedings of the IEEE, vol. 87, Issue 3, Mar. 1999, ISSN 0018-9219, http://cva.stanford.edu/cs99s/papers/hennessy-cc.pdf.
“Survey on Cache Coherence in Shared & Distributed Memory Multiprocessors”, Garg, et al, Online, http://www.cse.psu.edu/˜cg530/proj03/cache—coherence.pdf.
“A Survey of Cache Coherence Mechanisms in Shared Memory Multiprocessors”, Lawrence, Department of Computer Science, University of Manitoba, Manitoba, Canada, May 14, 1998, http://www.cs.uiowa.edu/˜rlawrenc/research/Papers/cc.pdf.
“Bandwidth Adaptive Snooping”, Martin, et al. 8th Annual International Symposium on High-Performance Computer Architecture (HPCA-8), Cambridge, MA, Feb. 2-6, 2002.
“Timestamp Snooping: An Approach for Extending SMPs”, Martin, et al., 9th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-IX), Cambridge, MA, Nov. 13-15, 2000.
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| Continuity Data: |
| Application Number | Filed | Notes |
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US2003000610447 | 2003-06-30 | is a
related to the prior publication |
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US20040111564A1 issued 2004-06-10 Computer system implementing synchronized broadcast using skew control and queuing
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US2003000610447 | 2003-06-30 | is a
non-provisional of provisional |
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US2002000392569P
| 2002-06-28 |
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