a substrate containing wiring traces for conducting signals;

first contact pads along a first edge of the substrate, the first contact pads for mating with a memory module socket on a motherboard;

a test socket, mounted to the substrate, for receiving a memory module during testing;

wherein the memory module contains memory chips and a buffer chip; wherein the buffer chip buffers data from the memory chips to the test socket and the memory chips do not directly drive data to the test socket;

northbound-lane module inputs, on the test socket, for connecting to northbound-lane inputs of the buffer chip on the memory module, the northbound-lane module inputs being differential inputs for carrying data buffered from memory chips of downstream memory modules;

northbound-lane module outputs, on the test socket, for connecting to northbound-lane outputs of the buffer chip on the memory module, the northbound-lane module outputs being differential outputs for carrying data buffered from the memory chips;

a northbound loopback, in the wiring traces, that connects the northbound-lane module outputs on the test socket to corresponding northbound-lane module inputs on the test socket,

northbound-lane motherboard inputs, on the first contact pads, that are disconnected from the test socket; and

northbound-lane motherboard outputs, on the first contact pads, that are disconnected from the test socket,

whereby northbound lanes from the test socket are looped back and disconnected from northbound lanes on the motherboard.