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Title: US7246434: Method of making a surface mountable PCB module
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Country: US United States of America

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17 pages

 
Inventor: Taylor, Craig M.; Pleasanton, CA, United States of America
Kenny, David J.; State College, PA, United States of America

Assignee: Pericom Semiconductor Corp., San Jose, CA, United States of America
other patents from PERICOM SEMICONDUCTOR CORP. (713978) (approx. 58)
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Published / Filed: 2007-07-24 / 2004-10-11

Application Number: US2004000711869

IPC Code: Advanced: H01K 3/10;
Core: H01K 3/00;

ECLA Code: H05K3/40C; H05K3/34C4C; T05K1/14B; T05K3/00K4; T05K3/26;

U.S. Class: 029/852; 029/830; 029/832; 029/840; 029/846;

Field of Search: 029/830,832,840,846,852

Priority Number:
2004-10-11  US2004000711869

Abstract:     A printed-circuit board (PCB) module has co-planar solder pads on a bottom surface. The solder pads can be surface-mounted to pads on a main board, allowing the PCB module to be surface mounted without wire leads extending from the PCB module substrate. A cavity is formed between the solder pads on the bottom surface. The cavity is formed by milling away some of the thickness of a sacrificial insulator layer, which is the insulator layer under the solder-pad metal layer. The sacrificial insulator layer can be made thicker to allow for milling the cavity without milling into inner metal layers on the PCB module. After milling away much of the sacrificial insulator layer, stand-offs remain under the solder pads, providing a stand-off gap between the top of the cavity and the solder pads when soldered to the main board. The stand-off gap allows for cleaning under the PCB module.

Attorney, Agent or Firm: g Patent LLC ; Auvinen, Stuart T. ;

Primary / Asst. Examiners: Arbes, Carl J.;

INPADOC Legal Status: Show legal status actions

Family: None

First Claim:
Show all 15 claims
    1. A manufacturing process for making a surface-mountable printed-circuit board (PCB) module comprising:

etching inner metal layers on both sides of an insulating core to form patterned interconnect on the inner metal layers;

laminating a component metal sheet and a component insulator layer over one of the inner metal layers;

laminating a pad metal sheet and a sacrificial insulator layer over another one of the inner metal layers;

etching the component metal sheet to form patterned component-layer interconnect from the component metal sheet;

etching a pad metal layer of the pad metal sheet to form solder pads from the pad metal sheet;

drilling castellation vias on the pad metal layer, and forming metal inside the castellation vias that connect the pad metal layer to the patterned component-layer interconnect or the patterned interconnect on the inner metal layers;

milling a cavity into the sacrificial insulator layer, the cavity not reaching the patterned interconnect on the inner metal layers; and

wherein the sacrificial insulator layer covered by the solder pads forms a plurality of stand-offs after milling,

whereby the solder pads on the stand-offs are surface-mountable to a main board.



Background / Summary: Show background / summary

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Description: Show description

       
U.S. References: Go to Result Set: All U.S. references   |  No patents reference this one   |   Backward references (16)   |   Citation Link

Buy
PDF
Patent  Pub.Date  Inventor Assignee   Title
Buy PDF- 18pp US5074037  1991-12 Sutcliffe et al.  Oerlikon-Contraves AG Process for producing electrical connections on a universal substrate
Buy PDF- 6pp US5670750  1997-09 Lauffer et al.  International Business Machines Corporation Electric circuit card having a donut shaped land
Buy PDF- 18pp US6104095  2000-08 Shin et al.  Samsung Electronics Co., Ltd. Printed circuit board and chip-on-board packages using same
Buy PDF- 9pp US6134117  2000-10 Funk et al.  Delphi Technologies, Inc. Method for high resolution trimming of PCB components
Buy PDF- 42pp US6137064  2000-10 Kiani et al.  Teradyne, Inc. Split via surface mount connector and related techniques
Buy PDF- 18pp US6245490  2001-06 Yoon et al.  Samsung Electronics Co., Ltd. Method of manufacturing a circuit board having metal bumps and a semiconductor device package comprising the same
Buy PDF- 17pp US6566166  2003-05 Chien  VIA Technologies Inc. Method of manufacturing a cavity-down plastic ball grid array (CD-PBGA) substrate
Buy PDF- 22pp US6609297  2003-08 Hiramatsu et al.  Ibiden Co., Ltd. Method of manufacturing multilayer printed wiring board
Buy PDF- 11pp US6609915  2003-08 Adams et al.  FCI Americas Technology Interconnect for electrically connecting a multichip module to a circuit substrate and processes for making and using same
Buy PDF- 15pp US6637641  2003-10 Downes et al.  EMC Corporation Systems and methods for manufacturing a circuit board
Buy PDF- 29pp US6759271  2004-07 Miyazaki  NEC Electronics Corporation Flip chip type semiconductor device and method of manufacturing the same
Buy PDF- 74pp US6759738  2004-07 Fallon et al.  International Business Machines Corporation Systems interconnected by bumps of joining material
Buy PDF- 12pp US6944945  2005-09 Shipley et al.  Shipley Company, L.L.C. Sequential build circuit board
Buy PDF- 19pp US20020133943A1  2002-09 Sakamoto et al.   Method for manufacturing circuit device
Buy PDF- 20pp US20030040138A1  2003-02 Kobayashi et al.   Method of manufacturing circuit device
Buy PDF- 49pp US20060180344A1  2006-08 Ito et al.   Multilayer printed wiring board and process for producing the same
       
Foreign References: None

Other References:
  • J-lead Clip Drawing, “Surface Mount Applications”. Jun. 9, 2003 ( from http://www.nasinterplex.com/nassmt/smt61.html ).
  • SCG2500 Synchronous Clock Generators, Prelim. Data Sheet # SG027, Connor Winfield, pp. 1-10, Mar. 15, 2002.


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