a lock-monitor register having a plurality of lock bits, said lock bits indicating, for a processor in a plurality of processors, the status of a request for access to a shared resource and wait status for access to a shared resource;

a plurality of sticky-lock bits, in the lock-monitor register, a sticky-lock bit indicating a sticky-lock state when a processor in a plurality of processors had requested access to the shared resource during a prior monitoring period of time;

a periodic reseter that is activated at an end of each monitoring period to reset the sticky-lock bits that indicate the sticky-lock state in the lock-monitor register to not indicate the sticky-lock state; and

a resource-lock monitor, coupled to the lock-monitor register, the resource-lock monitor being activated to read the lock-monitor register during each monitoring period, the resource-lock monitor identifying a stuck processor in the plurality of processors when the lock bit for the stuck processor indicates that the stuck processor is waiting for access to the shared resource, but the sticky-lock bit for the stuck processor is not in the sticky-lock state;

a resource arbiter that receives requests from the plurality of processors for access to the shared resource, the resource arbiter determining a selected processor from a plurality of requesting processors in the plurality of processors, the plurality of requesting processors all currently requesting access to the shared resource;

wherein the resource arbiter sends a grant to the selected processor to allow the selected processor to access the shared resource;

wherein a lock bit in the lock-monitor register is cleared in response to the selected processor releasing the grant back to the resource arbiter to indicate that the selected processor is no longer accessing the shared resource,

whereby the stuck processor waiting for access to the shared resource is identified by a combination of the lock bit and the sticky-lock bit for the stuck processor read from the lock-monitor register with the plurality of lock and sticky-lock bits for the plurality of processors.