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Title: |
US7610438:
Flash-memory card for caching a hard disk drive with data-area toggling of pointers stored in a RAM lookup table
[ Derwent Title ]

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Country: |
US United States of America

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Inventor: |
Lee, Charles C.; Cupertino, CA, United States of America
Yu, I-Kang; Palo Alto, CA, United States of America
Lee, Edward W.; Mountain View, CA, United States of America
Shen, Ming-Shiang; Taipei Hsien, Taiwan

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Assignee: |
Super Talent Electronics, Inc., San Jose, CA, United States of America
other patents from SUPER TALENT ELECTRONICS, INC. (849512) (approx. 1)
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Published / Filed: |
2009-10-27
/ 2007-01-17

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Application Number: |
US2007000623860

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IPC Code: |
Advanced:
G06F 12/06;
Core:
more...

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ECLA Code: |
G06F12/08B12; S06F12/02D2E2; S06F12/08B2;

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U.S. Class: |
711/103;
711/113;

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Field of Search: |
Non/00e

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Priority Number: |

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Abstract: |
A flash-memory cache card caches data that a host writes to a hard disk drive. A flash-memory array has physical blocks of flash memory arranged into first and second data areas having M blocks each, and a wear-leveling-counter pool. An incoming logical sector address (LSA) from a host is mapped to one of M entries in a RAM lookup table using a hash of modulo M. The RAM entry stores a mapping to a physical block in a foreground area that is either the first or the second data area. Pages in the physical block are read for a matching LSA that indicates a cache hit. Full pages are written back to the hard disk and erased in the background while the other data area becomes the foreground area. A new physical block with a low wear-level count is selected from blocks in the new foreground area.

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Attorney, Agent or Firm: |
Auvinen, Stuart T. ;
gPatent LLC ;

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Primary / Asst. Examiners: |
Thai, Tuan V; Dinh, Ngoc V

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INPADOC Legal Status: |
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Parent Case: |
RELATED APPLICATION
This application is a continuation-in-part (CIP) of the application for “Electronic Data Storage Medium with Fingerprint Verification Capability”, U.S. Ser. No. 09/478,720 (now U.S. Pat. No. 7,257,714), filed Jan. 6, 2000. This application is also a CIP of “USB Card Reader”, U.S. Ser. No. 10/956,826 (now U.S. Pat. No. 7,299,826), filed Oct. 1, 2004, which is a CIP of “System and Method for Controlling Flash Memory”, U.S. Ser. No. 10/789,333 (now U.S. Pat. No. 7,318,117), filed Feb. 26, 2004.

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Family: |
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First Claim:
Show all 21 claims |
1. A flash-memory cache sub-system comprising: a flash-memory array of physical blocks of flash memory identified by a physical-block address (PBA), a physical block having a plurality of pages, a page having a data sector that can be written with arbitrary data only once before requiring an erase of the physical block; wherein the data sector is block-addressable and not randomly-addressable, wherein all bytes of the data sector are accessible together as a block an not accessible as individual bytes; a first data area formed from first physical blocks of flash memory in the flash-memory array; a second data area formed from second physical blocks of flash memory in the flash-memory array; wherein each page in the first physical blocks and each page in the second physical blocks stores host data from a host in the data sector for the page, and stores a logical-sector address (LSA) from the host, the LSA from the host being a host address for the host data from the host; and toggle means, activated when host data needs to be stored into a full physical block that has no empty pages, for toggling a full first physical block to a background area by writing data sectors from the full first physical block to an external mass storage device and erasing the full first physical block, and for selecting an empty second physical block to receive the host data; the toggle means also for toggling a full second physical block to the background area by writing data sectors from the full second physical block to the external mass storage device and erasing the full second physical block, and for selecting an empty first physical block to receive the host data.

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